A photovoltaic device including a single junction solar cell provided by an absorption layer of a type IV semiconductor material having a first conductivity, and an emitter layer of a type III-V semiconductor material having a second conductivity, wherein the type III-V semiconductor material has a thickness that is no greater than 50 nm.

The invention relates to a method for producing a photovoltaic solar cell having at least one hetero-junction, including the following steps: A) providing a semiconductor substrate having base doping; B) producing a hetero-junction on at least one side of the semiconductor substrate, which hetero-junction has a doped hetero-junction layer and a dielectric tunnel layer arranged indirectly or directly between the hetero-junction layer and the semiconductor substrate; C) heating at least the hetero-junction layer in order to improve the electrical quality of the heterojunction. The invention is characterized in that, in a step D after step C, hydrogen is diffused into the hetero-junction layer and/or to the interface between the tunnel layer and the semiconductor substrate.

A composition for forming a passivation layer, comprising a compound represented by Formula (I): M(OR.sup.1).sub.m. In Formula (I), M comprises at least one metal element selected from the group consisting of Nb, Ta, V, Y and Hf, each R.sup.1 independently represents an alkyl group having from 1 to 8 carbon atoms or an aryl group having from 6 to 14 carbon atoms, and m represents an integer from 1 to 5.

A preparation method for an N-type TOPCon cell comprising 1) texturing an N-type silicon wafer with an alkaline solution; 2) performing boron diffusion and laser lightly-doping on a front face of the wafer to form a lightly-doped region, and performing re-diffusion to form a front mask; 3) polishing a back face of the wafer; 4) performing three-in-one multi-layer thin film deposition on the back face of the wafer, to grow a tunneling silicon oxide thin film layer, a doped amorphous silicon thin film layer, and a back mask; 5) performing high-temperature annealing under a preset high-temperature condition to form a doped polysilicon layer and activate doped phosphorus; 6) cleaning the front mask on the front face and back mask on the back face of the wafer; 7) depositing passivation films on the front face and back face of the N wafer; and 8) printing and sintering.

A solar cell and a method for preparation the solar cell are provided. The solar cell includes a semiconductor substrate, a hole transport layer and an electronic transport layer, a first passivation layer and a second passivation layer. The semiconductor substrate includes a first surface and a second surface opposite to each other. The hole transport layer and the electronic transport layer are disposed on the first surface at interval. A material of the hole transport layer includes vanadium oxide, and a material of the electronic transport layer includes titanium oxide. The first passivation layer is located on a surface of the hole transport layer away from the semiconductor substrate. A surface of the first passivation layer away from the semiconductor substrate, a surface of the electronic transport layer away from the semiconductor substrate, and the first surface are all covered by the second passivation layer.

A solar cell includes a semiconductor substrate, in which a rear surface of the semiconductor substrate having non-pyramid-shaped microstructures, the non-pyramid-shaped microstructures include two or more first substructures at least partially stacked on one another, and a one-dimensional size of the surface of the outermost first substructure is less than or equal to 45 m; a first passivation layer located on a front surface of the semiconductor substrate; first and second tunnel oxide layers located on the non-pyramid-shaped microstructures; first and second doped conductive layers located on a surface of the first and second tunnel oxide layers, the first and second doped conductive layer has different conductive types; a second passivation layer located on a surface of the first and second doped conductive layers; and electrodes formed by penetrating through the second passivation layer to be in contact with the first and second doped conductive layers.

A solar cell can include a silicon semiconductor substrate; an oxide layer on a first surface of the silicon semiconductor substrate; a polysilicon layer on the oxide layer; a diffusion region at a second surface of the silicon semiconductor substrate; a dielectric film on the polysilicon layer; a first electrode connected to the polysilicon layer through the dielectric film; a passivation film on the diffusion region; and a second electrode connected to the diffusion region through the passivation film.

A manufacturing method includes steps of forming a texture on a surface of a single-crystalline silicon substrate, cleaning the surface of the single-crystalline silicon substrate using ozone, depositing an intrinsic silicon-based layer on the texture on the single-crystalline silicon substrate, and depositing a conductive silicon-based layer on the intrinsic silicon-based layer, in this order. The single-crystalline silicon substrate before deposition of the intrinsic silicon-based layer has a texture size of less than 5 m. A recess portion of the texture has a curvature radius of less than 5 nm. After deposition of at least a part of the intrinsic silicon-based layer and before deposition of the conductive silicon-based layer, the intrinsic silicon-based layer is subjected to a plasma treatment in an atmosphere of a gas mainly composed of hydrogen.

Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.

The present invention relates to a plasma texturing method for silicon based solar cells and the nanostructured silicon solar cells produced thereof. The silicon based solar cell comprises a silicon substrate having in at least part of its surface conical shaped nanostructures having an average height between 200 and 450 nm and a pitch between 100 and 200 nm, thereby achieving low reflectance and minimizing surface charge recombination.