A 3D semiconductor device including: a first level including a first single crystal layer and first transistors, which each include a single crystal channel; a first metal layer with an overlaying second metal layer; a second level including second transistors, overlaying the first level; a third level including third transistors, overlaying the second level; a fourth level including fourth transistors, overlaying the third level, where the second level includes first memory cells, where each of the first memory cells includes at least one of the second transistors, where the fourth level includes second memory cells, where each of the second memory cells includes at least one of the fourth transistors, where the first level includes memory control circuits, where second memory cells include at least four memory arrays, each of the four memory arrays are independently controlled, and at least one of the second transistors includes a metal gate.

A solar cell module includes a plurality of solar cells each including a semiconductor substrate, first electrodes positioned on a front surface of the semiconductor substrate, and second electrodes positioned on a back surface of the semiconductor substrate, and a plurality of wiring members connecting the first electrodes of a first solar cell of the plurality of solar cells to the second electrode of a second solar cell adjacent to the first solar cell. At least a portion of the first electrodes includes first pads each having a width greater than a width of the first electrode at crossings of the wiring members and the first electrodes. A size of at least one of the first pads is different from a size of the remaining first pads.

The disclosure provides a solar cell and a back contact structure thereof, a photovoltaic module, and a photovoltaic system. The back contact structure includes a first doped region having an opposite polarity to a silicon substrate and a second doped region having a same polarity as the silicon substrate. An isolation region is arranged between the first doped region and the second doped region. The protective region arranged on the first doped region includes an insulation layer and a third doped layer having a same polarity as the second doped region. An opening is provided in the protective region to connect the first conductive layer to the first doped region. In the present invention, scratches caused by belt transmission in an existing cell fabrication process is resolved.

A solar cell module with interconnect wires wire-bonded to back-contact solar cells. A solar cell module using an interconnect board to electrical interconnect back-contact solar cells. The interconnect board may also contain a bypass diode and circuitry to connect the bypass diode to solar cells of the module.

Photovoltaic cells, methods for fabricating surface mount multijunction photovoltaic cells, methods for assembling solar panels, and solar panels comprising photovoltaic cells are disclosed. The surface mount multijunction photovoltaic cells include through-wafer-vias for interconnecting the front surface epitaxial layer to a contact pad on the back surface. The through-wafer-vias are formed using a wet etch process that removes semiconductor materials non-selectively without major differences in etch rates between heteroepitaxial III-V semiconductor layers.

Die-cutting approaches for foil-based metallization of solar cells, and the resulting solar cells are disclosed herein. Die-cutting approaches for foil-based metallization of solar cells include forming a plurality of semiconductor regions in or above a substrate and forming a patterned damage buffer in alignment with locations between the plurality of semiconductor regions. Additionally, a metal layer comprising a metal seed layer and/or metal foil is formed over the patterned damage buffer. The metal layer is cut by a cutting die at locations between the plurality of semiconductor regions by applying a mechanical force to the cutting die.

The present invention relates a photovoltaic module comprising 126, 138 or 150 back-contact half-cells. In an embodiment, the half-cells are divided into 3 groups of each 2 parallel strings with each string containing of the total number of half-cells. The module comprises an additional row of 6 back-contact half-cells, relative to known half-cell modules.

The present disclosure provides methods of fabricating a multijunction solar cell panel in which one or more of the steps are performed using an automated process. In some embodiments, the automated process uses machine vision.

A photovoltaic device and method include a substrate coupled to an emitter side structure on a first side of the substrate and a back side structure on a side opposite the first side of the substrate. The emitter side structure or the back side structure include layers alternating between wide band gap layers and narrow band gap layers to provide a multilayer contact with an effectively increased band offset with the substrate and/or an effectively higher doping level over a single material contact. An emitter contact is coupled to the emitter side structure on a light collecting end portion of the device. A back contact is coupled to the back side structure opposite the light collecting end portion.

In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.