H10D30/67

Complementary metal oxide semiconductor device

Provided is a semiconductor device including a first semiconductor transistor including a semiconductor channel layer, and a metal-oxide semiconductor channel layer, and having a structure in which a second semiconductor transistor is stacked on the top of the first semiconductor transistor. A gate stack of the second semiconductor transistor and the top of a gate stack of the first semiconductor transistor may overlap by greater than or equal to 90%. The first semiconductor transistor and the second semiconductor transistor may have a similar level of operation characteristics.

Radio-frequency switching devices having improved voltage handling capability

Radio-frequency (RF) switching devices having improved voltage handling capability. In some embodiments, a switching device can include a first terminal and a second terminal, and a plurality of switching elements connected in series to form a stack between the first terminal and the second terminal. The switching elements can have a non-uniform distribution of a parameter that results in the stack having a first voltage handling capacity that is greater than a second voltage handling capacity corresponding to a similar stack having a substantially uniform distribution of the parameter.

Oxide semiconductor film and semiconductor device

To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In.sub.1+Ga.sub.1O.sub.3(ZnO).sub.m (0<<1 and m=1 to 3 are satisfied), and the composition of the entire oxide semiconductor film including the c-axis-aligned crystalline region is represented by In.sub.xGa.sub.yO.sub.3(ZnO).sub.m (0<x<2, 0<y<2, and m=1 to 3 are satisfied).

Imaging device and electronic device

An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.

Semiconductor device

An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.

Fins for metal oxide semiconductor device structures
12205955 · 2025-01-21 · ·

Methods are disclosed for forming fins in transistors. In one embodiment, a method of fabricating a device includes forming silicon fins on a substrate and forming a dielectric layer on the substrate and adjacent to the silicon fins such that an upper region of each silicon fin is exposed. Germanium may then be epitaxially grown germanium on the upper regions of the silicon fins to form germanium fins.

Display device and electronic device

A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

Gate-all-around integrated circuit structures having oxide sub-fins

Gate-all-around integrated circuit structures having oxide sub-fins, and methods of fabricating gate-all-around integrated circuit structures having oxide sub-fins, are described. For example, an integrated circuit structure includes an oxide sub-fin structure having a top and sidewalls. An oxidation catalyst layer is on the top and sidewalls of the oxide sub-fin structure. A vertical arrangement of nanowires is above the oxide sub-fin structure. A gate stack is surrounding the vertical arrangement of nanowires and on at least the portion of the oxidation catalyst layer on the top of the oxide sub-fin structure.

Semiconductor device

An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.

Display device and method of manufacturing the same

A display device includes a substrate, a semiconductor layer, an insulating layer, and a conductive layer. The semiconductor layer is disposed on the substrate, includes a channel of a first transistor, and includes a channel of a second transistor. The insulating layer is disposed on the semiconductor layer. The conductive layer is disposed on the insulating layer, includes a gate electrode of the first transistor, and includes a gate electrode of the second transistor. The channel of the first transistor includes a first first-element impurity ion and a second-element impurity ion different from the first first-element impurity ion. The channel of the second transistor includes a second first-element impurity ion identical to the first first-element impurity ion.