Patent classifications
H10D86/423
Integrated Assemblies Comprising Hydrogen Diffused Within Two or More Different Semiconductor Materials, and Methods of Forming Integrated Assemblies
Some embodiments include an integrated assembly having a first semiconductor material between two regions of a second semiconductor material. The second semiconductor material is a different composition than the first semiconductor material. Hydrogen is diffused within the first and second semiconductor materials. The conductivity of the second semiconductor material increases in response to the hydrogen diffused therein to thereby create a structure having the second semiconductor material as source/drain regions, and having the first semiconductor material as a channel region between the source/drain regions. A transistor gate is adjacent the channel region and is configured to induce an electric field within the channel region. Some embodiments include methods of forming integrated assemblies.
Display Device
Disclosed is a display device that is capable of being driven with low power consumption. A first thin-film transistor including a polycrystalline semiconductor layer and a second thin-film transistor including an oxide semiconductor layer are disposed in an active area, thereby reducing power consumption. At least one opening formed in a bending area is formed to have the same depth as any one of contact holes formed in the active area, thereby making it possible to form the opening and the contact holes through the same process and consequently simplifying the process of manufacturing the device. A second source electrode of the second thin-film transistor and a second gate electrode of the second thin-film transistor overlap each other with an upper interlayer insulation film interposed therebetween so as to form a first storage capacitor.
THIN FILM TRANSISTOR, THIN FILM TRANSISTOR ARRAY PANEL INCLUDING THE SAME, AND METHOD OF MANUFACTURING THE SAME
A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
LIGHT-EMITTING ELEMENT-THIN FILM TRANSISTOR INTEGRATION STRUCTURE
Disclosed is a Light-Emitting Device-Thin Film Transistor (LED-TFT) integration structure, comprising a substrate comprising a light emitting area and a driving area; a metal reflective film formed on the substrate; a buffer layer formed on the metal reflective film; LED disposed in the light emitting area; a protective layer formed on the LED; a thin film transistor disposed in the driving area and configured to drive the LED; and an ohmic contact metal for electrically connecting a cathode of the LED with the metal reflective film, wherein the LED and the thin film transistor are integrally formed on the substrate.
Method for fabricating displaying backplane, displaying backplane and displaying device
The present disclosure provides a displaying backplane and a displaying device, and relates to the technical field of displaying. The displaying backplane includes: a substrate base plate; a first active layer and a second active layer that are provided on the substrate base plate, wherein the material of the first active layer and the second active layer is an oxide semiconductor, the first active layer has a first channel region and first no-channel regions, and the second active layer has a second channel region and second no-channel regions; a first grid insulating layer covering the first active layer and the second active layer; and a first grid and a second grid that are provided on the first grid insulating layer; wherein the oxygen-vacancy concentration of the first channel region is greater than the oxygen-vacancy concentrations of the first no-channel regions, the second no-channel regions and the second channel region.
Two transistor gain cell memory with indium gallium zinc oxide
An example two transistor (2T) gain cell memory with indium-gallium-zinc-oxide (IGZO) transistors. Examples include IGZO transistors included in a dynamic random access memory (DRAM) cell. The IGZO transistors included in the DRAM cell are described as being formed or created in a back end (BE) metal process stack of an integrated circuit chip or die.
Semiconductor device and method for manufacturing the same
A region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are formed separately in one oxide semiconductor film. The region containing a high proportion of crystal components is formed so as to serve as a channel formation region and the other region is formed so as to contain a high proportion of amorphous components. It is preferable that an oxide semiconductor film in which a region containing a high proportion of crystal components and a region containing a high proportion of amorphous components are mixed in a self-aligned manner be formed. To separately form the regions which differ in crystallinity in the oxide semiconductor film, first, an oxide semiconductor film containing a high proportion of crystal components is formed and then process for performing amorphization on part of the oxide semiconductor film is conducted.
Light-emitting device and electronic device using the same
A lightweight flexible light-emitting device which is able to possess a curved display portion and display a full color image with high resolution and the manufacturing process thereof are disclosed. The light-emitting device comprises: a plastic substrate; an insulating layer with an adhesive interposed therebetween; a thin film transistor over the insulating layer; a protective insulating film over the thin film transistor; a color filter over the protective insulating film; an interlayer insulating film over the color filter; and a white-emissive light-emitting element formed over the interlayer insulating film and being electrically connected to the thin film transistor.
Display panel and display device
Provided are a display panel and a display device. The display panel includes a base substrate; a first transistor, a second transistor and a third transistor, where the first transistor, the second transistor and the third transistor are formed on the base substrate, the first transistor includes a first active layer, a first gate, a first source, and a first drain, the first active layer contains silicon, the second transistor includes a second active layer, a second gate, a second source, and a second drain, and the second active layer contains an oxide semiconductor; and a first insulating layer and a second insulating layer, where the first insulating layer is disposed on one side of the second active layer facing away from the base substrate and between the second gate and the second active layer.
Semiconductor device
A semiconductor device including: a first gate electrode; a first gate insulating layer on the first gate electrode; a first oxide semiconductor layer on the first insulating layer; source and drain electrodes connected to the first oxide semiconductor layer; a second gate insulating layer on the first oxide semiconductor layer; a second oxide semiconductor layer on the second gate insulating layer; a second gate electrode on the second oxide semiconductor layer, the second gate electrode being in contact with the second oxide semiconductor layer; a first insulating layer on the second gate electrode, the first insulating layer having a part of a first aperture overlapping with the second oxide semiconductor layer in a planar view; and a first connecting electrode electrically connecting the first gate electrode and the second gate electrode via the first aperture.