Provided is a novel semiconductor device. A switching element, specifically a transistor having a well potential structure is manufactured by utilizing a structure including at least a composite material in which a first region and a second region are stacked over a base like a superlattice. The thickness of each of the first region and the second region is greater than or equal to 0.5 nm and less than or equal to 5 nm. A band structure can be controlled by adjusting the number of stacks, which enables application to a variety of semiconductor elements.

A semiconductor device having a novel structure is provided in which a transistor including an oxide semiconductor and a transistor including a semiconductor material which is not an oxide semiconductor are stacked. Further, a semiconductor device in which a semiconductor element and a capacitor are formed efficiently is provided. In a semiconductor device, a first semiconductor element layer including a transistor formed using a semiconductor material which is not an oxide semiconductor, such as silicon, and a second semiconductor element layer including a transistor formed using an oxide semiconductor are stacked. A capacitor is formed using a wiring layer, or a conductive film or an insulating film which is in the same layer as a conductive film or an insulating film of the second semiconductor element layer.

This semiconductor device includes a substrate and a thin film transistor supported on the substrate. The thin film transistor includes a gate electrode, a semiconductor layer, a gate-insulating layer provided between the gate electrode and the semiconductor layer, and a source electrode and a drain electrode respectively making contact with the semiconductor layer. The source electrode and the drain electrode respectively include a main layer containing aluminum or copper, a lower layer having a first layer containing refractory metal and positioned at a substrate side of the main layer, and an upper layer having a second layer containing refractory metal. The upper layer is provided so as to cover an upper surface of the main layer and at least the section of the side face of the main layer that overlaps the semiconductor layer.

Stable electrical characteristics of a transistor including an oxide semiconductor layer are achieved. A highly reliable semiconductor device including the transistor is provided. The semiconductor device includes a multilayer film formed of an oxide layer and an oxide semiconductor layer, a gate insulating film in contact with the oxide layer, and a gate electrode overlapping with the multilayer film with the gate insulating film interposed therebetween. The oxide layer contains a common element to the oxide semiconductor layer and has a large energy gap than the oxide semiconductor layer. The composition between the oxide layer and the oxide semiconductor layer gradually changes.

As source and drain wiring, a base layer and a cap layer are each formed of a MoNiNb alloy film, and a low-resistance layer is formed of Cu. The resultant laminated metal film is patterned through one-time wet etching to form a drain electrode and a source electrode. Cu serving as a main wiring layer does not corrode because of being covered with a MoNiNb alloy having good corrosion resistance. Further, even when a protective insulating film including an oxide is formed by plasma CVD in an oxidizing atmosphere, Cu is not oxidized. With the wet etching, the sidewall taper angle of the laminated metal film can be controlled to 20 degrees or more and less than 70 degrees.

A method for making a thin film transistor includes a step of forming a semiconducting layer, a source electrode, a drain electrode, a gate electrode, and an insulating layer on an insulating substrate. A process of forming the semiconducting layer comprises a step of sputtering an oxide semiconductor film on a substrate by using a sputtering target comprising In2CexZnO4+2x, wherein x=0.52.

Provided are: a sintered oxide which is capable of obtaining low carrier density and high carrier mobility when configured as an oxide semiconductor thin film by using a sputtering method; and a sputtering target which uses the same. The sintered oxide contains indium, gallium and copper as oxides. It is preferable for the gallium content to be at least 0.08 and less than 0.20 when expressed as an atomic ratio (Ga/(In+Ga)), the copper content to be at least 0.001 and less than 0.03 when expressed as an atomic ratio (Cu/(In+Ga+Cu)), and for the sintering to be performed at 1,200-1,550 C., inclusive. A crystalline oxide semiconductor thin film obtained by forming this sintered oxide as a sputtering target makes it possible to achieve a carrier density of 1.010.sup.18 cm.sup.3 or lower, and a carrier mobility of 10 cm.sup.2 V.sup.1 sec.sup.1 or higher.

An oxide semiconductor film includes indium (In), cerium (Ce), zinc (Zn), doping metal element (M) and oxygen (O) elements, and a molar ratio of the In, Ce, and Zn as In:Ce:Zn is in a range of 2:(0.5 to 2):1. A method for making a oxide semiconductor film includes a step of forming an oxide film on a substrate by using a sputtering method and a sputtering target comprising In.sub.2Ce.sub.xZnO.sub.4+2x, wherein x=0.52.

A metal element of a metal film is introduced into the oxide semiconductor film by performing heat treatment in the state where the oxide semiconductor film is in contact with the metal film, so that a low-resistance region having resistance lower than that of a channel formation region is formed. A region of the metal film, which is in contact with the oxide semiconductor film, becomes a metal oxide insulating film by the heat treatment. After that, an unnecessary metal film is removed. Thus, the metal oxide insulating film can be formed over the low-resistance region.

A method of making a display device includes, providing a substrate having a display area and a pad area in a periphery of the display area, the display area including a plurality of pixel regions; forming a thin film transistor having a channel layer on the substrate; arranging a gate link line and a first common voltage line to cross each other, and having a first insulation film be interposed therebetween; arranging a second common voltage line and a data link line to cross each other, and having second insulation film be interposed therebetween; disposing a first pattern on the first insulation film; and disposing a second pattern on the second insulation film, wherein the channel layer, the first pattern and the second pattern are formed of the same material.