A method for manufacturing a semiconductor device, the method comprising steps of: forming a first metal oxide layer containing aluminium as a main component above an insulating surface; performing a planarization process on a surface of the first metal oxide layer; forming an oxide semiconductor layer on the insulating surface on which the planarization process is performed; forming a gate insulating layer above the oxide semiconductor layer; and forming a gate electrode facing the oxide semiconductor layer above the gate insulating layer.

A thin film transistor includes a metal oxide layer over the substrate, an oxide semiconductor layer having crystallinity in contact with the metal oxide layer, a gate electrode overlapping the oxide semiconductor layer, and an insulating layer between the oxide semiconductor layer and the gate electrode. The oxide semiconductor layer includes a plurality of crystal grains. Each of the plurality of crystal grains includes at least one of a crystal orientation <001>, a crystal orientation <101>, and a crystal orientation <111> obtained by an EBSD method. In occupancy rates of crystal orientations calculated based on measurement points having crystal orientations with a crystal orientation difference greater than or equal to 0 degrees and less than or equal to 15 degrees with respect to a normal direction of a surface of the substrate, an occupancy rate of the crystal orientation <001> is less than or equal to 5%.

An oxide semiconductor film having crystallinity over a substrate contains indium (In) and a first metal element (M1). The oxide semiconductor film includes a plurality of crystal grains. Each of the plurality of crystal grains includes at least one of a crystal orientation <001>, a crystal orientation <101>, and a crystal orientation <111> obtained by an electron backscatter diffraction (EBSD) method. In occupancy rates of crystal orientations calculated based on measurement points having crystal orientations with a crystal orientation difference greater than or equal to 0 degrees and less than or equal to 15 degrees with respect to a normal direction of a surface of the substrate, an occupancy rate of the crystal orientation <111> is greater than an occupancy rate of the crystal orientation <001> and an occupancy rate of the crystal orientation <101>.

A semiconductor device includes a metal oxide layer over an insulating surface, an oxide semiconductor layer over the metal oxide layer, and an insulating layer over the oxide semiconductor. The insulating layer includes a first region overlapping the oxide semiconductor layer. A first aluminum concentration of the first region is greater than or equal to 110.sup.17 atoms/cm.sup.3.

The present disclosure provides an array substrate and a manufacturing method for the array substrate. The manufacturing method includes: forming a light-shielding layer, a source, and a drain on the substrate by using a first photomask; forming a semiconductor layer, a gate insulating layer, and a gate which are laminated on the source, the drain, and light-shielding layer by using a second photomask; forming a dielectric layer on the gate and the substrate, and a via hole exposing the drain on the dielectric layer by using a third photomask; and forming a pixel electrode on the dielectric layer by using a fourth photomask.

An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 510.sup.19 atoms/cm.sup.3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained.

An organic light-emitting diode display includes an auxiliary connection line on a substrate; an auxiliary cathode on and connected to the auxiliary connection line; a passivation layer covering the auxiliary cathode; an overcoat layer on the passivation layer; a connection terminal connected to the auxiliary cathode on the overcoat layer; an undercut opening on the overcoat layer exposing a portion of the auxiliary cathode, an under area being in the undercut opening and under one side of the connection terminal; a bank having a size larger than the undercut opening and exposing the entire undercut opening; an organic emission layer on a region other than the under area in the undercut opening exposing the portion of the auxiliary cathode; and a cathode directly connected to the exposed portion of the auxiliary cathode on which the organic emission layer is not formed in the under area of the undercut opening.

A method of forming a device comprises forming dielectric structures over other dielectric structures overlying conductive contact structures, the dielectric structures separated from one another by trenches and laterally extending orthogonal to the other dielectric structures and the conductive contact structures. Conductive gate structures are formed on exposed side surfaces of the dielectric structures within the trenches. Dielectric oxide structures are formed on exposed side surfaces of the conductive gate structures within the trenches. Exposed portions of the other dielectric structures are removed to form isolation structures. Semiconductive pillars are formed on exposed side surfaces of the dielectric oxide structures and the isolation structures within the trenches. The semiconductive pillars are in electrical contact with the conductive contact structures. Additional conductive contact structures are formed on upper surfaces of the semiconductive pillars. A device, a memory device, and an electronic system are also described.

A display device includes a first transistor including a gate electrode, a second transistor including a lower gate electrode, an upper gate electrode, and a first end portion electrically connected to an end portion of the first transistor, a lower gate signal line extending in a first direction, an upper gate signal line disposed on the lower gate signal line and extending in a first direction, and a first connection pattern disposed on the upper gate signal line, electrically connecting the gate electrode and a second end portion of the second transistor, and intersecting the lower gate signal line and the upper gate signal line. An entirety of the upper gate signal line overlaps a part of the lower gate signal line in an overlapping area in which the lower gate signal line or the upper gate signal line overlaps the first connection pattern.

An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.