A device includes a substrate, a first conductive layer on the substrate, a first conductive via, and further conductive layers and conductive vias between the first conductive via and the substrate. The first conductive via is between the substrate and the first conductive layer, and is electrically connected to the first conductive layer. The first conductive via extends through at least two dielectric layers, and has thickness greater than about 8 kilo-Angstroms. An inductor having high quality factor is formed in the first conductive layer and also includes the first conductive via.

Aspects of the present disclosure include systems, structures, circuits, and methods providing planar transformers and planar transformer structures. The planar transformers and transformer structures can include first and second core layers of soft ferromagnetic material on opposite sides of an electrical substrate. First and second coils can be configured as conductive traces disposed on the opposite sides of the substrate. The first and second soft ferromagnetic layers are in contact in a contact region. One or more holes are disposed in either or both of the soft ferromagnetic layers and contain soft ferromagnetic material to reduce reluctance of the transformer structure. The planar transformer can be included in integrated circuit (chip) packages or modules. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a gate driver or other high voltage circuit.

Aspects of the present disclosure include systems, structures, circuits, and methods providing pin-coupled transformers and/or pin-coupled coil structures. A pin-coupled coil structure can include first and second substrates, each having a plurality of conductive traces. The conductive traces of the substrates are connected by conductive pins, forming one or more pin-coupled coil structures. Two pin-coupled coils structure can be configured around a transformer core forming a pin-coupled transformer structure. The pin-coupled transformer structure can be included in integrated circuit (chip) packages or modules. The packages and modules may include various types of circuits; in some examples, chip packages or modules may include a galvanically isolated gate driver or other high voltage circuit.

A monolithically integrated semiconductor device structure includes: a substrate and a transistor; the substrate includes a transistor region; the transistor is positioned above the transistor region comprising at least one first trench and at least one second trench that are arranged in a horizontal direction and extend in a vertical direction; and the first trench is disposed below a drain of the transistor, and the second trench is disposed below a non-drain region of the transistor. In the present disclosure, the first trench and the second trench that are disposed in the substrate of the monolithically integrated semiconductor device structure, which may reduce the equivalent dielectric constant of the substrate and improve the equivalent resistivity, so that the parasitic capacitance and leakage current of the substrate below the transistor are reduced.

An inductor package is described comprising a mold interconnection substrate having an embedded spiral coil inductor, a fan-out redistribution layer connected to the spiral coil inductor by a copper post wiring structure, a ferrite toroid coil in between the copper posts, and a semiconductor die mounted on the mold interconnection substrate and connected to the fan-out redistribution layer.

A semiconductor device includes a semiconductor substrate, an interconnection layer and an inductor pattern. The interconnection layer is disposed on the semiconductor substrate. The inductor pattern is electrically connected to the interconnection layer. The inductor pattern includes a first conductive line joined with a first terminal, a second conductive line joined with a second terminal, and a plurality of conductive coils. The conductive coils are joining the first conductive line to the second conductive line, and includes an outer coil joined with the first conductive line, an inner coil joined with the second conductive line and the outer coil. The second conductive line is spaced apart from a first side of the inner coil in a first direction by distance Y, the second terminal is spaced apart from a second side of the inner coil in a second direction by distance X1, wherein X1>1.25Y.

Structures including an inductor and methods of forming such structures. The structure comprises a semiconductor substrate including a first plurality of sealed cavities and a back-end-of-line stack on the semiconductor substrate. Each sealed cavity includes an air gap, and the back-end-of-line stack includes an inductor having a winding that overlaps with the scaled cavities.

A power supply module includes a first substrate; a control IC, a capacitor, a first electronic component, a second electronic component, a third electronic component and a fourth electronic component on a principal surface of the first substrate; a first submodule including a second substrate above the first electronic component, the second electronic component, the third electronic component, and the fourth electronic component and including a fifth electronic component, a sixth electronic component, and a seventh electronic component on a principal surface of the second substrate; and a resin covering an upper portion of the first submodule.

Fabrication of radio-frequency (RF) devices involves providing a field-effect transistor (FET) formed over an oxide layer formed on a semiconductor substrate, removing at least part of the semiconductor substrate to expose at least a portion of a backside of the oxide layer, applying an interface material to at least a portion of the backside of the oxide layer, removing at least a portion of the interface material to form a trench, and covering at least a portion of the interface material and the trench with a substrate layer to form a cavity.

A semiconductor integrated circuit includes an inductor and a plurality of high permeability patterns. The inductor includes one conductive loop. The high permeability patterns are disposed adjacent to the conductive loop.