A transistor device and a method for producing source regions of a transistor device are disclosed. The transistor device includes a semiconductor body with a plurality of mesa regions and a plurality of transistor cells each formed in a respective one of the mesa regions. Each transistor cell includes: a source region of a first doping type; a gate region of a second doping type complementary to the first doping type and spaced apart from the source region; a channel region of the first doping type; and a transition region different from the source region and the gate region. The transition region is arranged between the source region and the gate region and adjoins both the source region and the gate region.

A thin film transistor includes: a gate electrode; a gate insulating layer above the gate electrode; an oxide semiconductor layer disposed above the gate insulating layer; and a source electrode and a drain electrode disposed above the oxide semiconductor layer and electrically connected to the oxide semiconductor layer, wherein metallic elements included in the oxide semiconductor layer include at least indium (In), fluorine is included in a region which is an internal region in the oxide semiconductor layer and is close to the gate insulating layer, and a fluorine concentration of the region close to the gate insulating layer in the oxide semiconductor layer is higher than a fluorine of a contact region for the source electrode or the drain electrode in the oxide semiconductor layer.

An integrated circuit (IC) comprises first and second conductors in one layer of the IC, wherein the first conductor is oriented along a first direction, the second conductor is oriented along a second direction generally perpendicular to the first direction, and the second conductor is electrically connected to the first conductor. The IC further comprises a third conductor in another layer of the IC, oriented along the second direction, and above the second conductor; a first via connecting the first and third conductors; and a second via connecting the second and third conductors.

Provided is a transistor with stable electrical characteristics. Provided is a semiconductor device including an oxide semiconductor over a substrate, a first conductor in contact with a top surface of the oxide semiconductor, a second conductor in contact with the top surface of the oxide semiconductor, a first insulator over the first and second conductors and in contact with the top surface of the oxide semiconductor, a second insulator over the first insulator, a third conductor over the second insulator, and a third insulator over the third conductor. The third conductor overlaps with the first conductor with the first and second insulators positioned therebetween, and overlaps with the second conductor with the first and second insulators positioned therebetween. The first insulator contains oxygen. The second insulator transmits less oxygen than the first insulator. The third insulator transmits less oxygen than the first insulator.

In a first main surface of a silicon carbide substrate, a second trench having a second side surface which connects to the first main surface and is in contact with a third impurity region and a second impurity region and a second bottom portion continuous to the second side surface is formed. A fourth impurity region has a first region arranged between a second main surface and the second impurity region and a second region connecting the second bottom portion of the second trench and the first region to each other. A first electrode is electrically connected to the third impurity region on a side of the first main surface and is in contact with the second region at the second bottom portion of the second trench.

The present invention relates to a junction field effect transistor. The junction field effect transistor comprises a substrate (10), a buried layer in the substrate, a first well region (32) and a second well region (34) that are on the buried layer, a source lead-out region (50), a drain lead-out region (60), and a first gate lead-out region (42) that are in the first well region (32), and a second gate lead-out region (44) in the second well region (34). A Schottky junction interface (70) is disposed on the surface of the first well region (32). The Schottky junction interface (70) is located between the first gate lead-out region (42) and the drain lead-out region (60), and is isolated from the first gate lead-out region (42) and the drain lead-out region (60) by means of isolation structures. The present invention also relates to a manufacturing method for a junction field effect transistor.

A semiconductor device includes a base dielectric layer, a semiconductor substrate layer disposed on the base dielectric layer, and a transistor disposed in the semiconductor substrate layer. The transistor includes a gate dielectric layer disposed on the semiconductor substrate layer, a gate electrode disposed on the gate dielectric layer, source and drain electrodes disposed within the semiconductor substrate layer on opposite sides of the gate electrode, an undoped channel region, a base dopant region, and a threshold voltage setting region. The undoped channel region, base dopant region, and threshold voltage setting region are disposed within the semiconductor substrate layer. The undoped channel region is disposed between the source electrode and the drain electrode, and the base dopant region and the threshold voltage setting region extend beneath the source electrode and the drain electrode. The threshold voltage setting region is disposed between the undoped channel region and the base dopant region.

A semiconductor device includes transistor cells formed along a first surface at a front side of a semiconductor body in a transistor cell area. A drift zone structure forms first pn junctions with body zones of the transistor cells. An auxiliary structure between the drift zone structure and a second surface at a rear side of the semiconductor body includes a first portion that contains deep level dopants requiring at least 150 meV to ionize. A collector structure directly adjoins the auxiliary structure. An injection efficiency of minority carriers from the collector structure into the drift zone structure varies along a direction parallel to the first surface at least in the transistor cell area.

The semiconductor device of the present invention includes a first conductivity type semiconductor layer made of a wide bandgap semiconductor and a Schottky electrode formed to come into contact with a surface of the semiconductor layer, and has a threshold voltage V.sub.th of 0.3 V to 0.7 V and a leakage current J.sub.r of 110.sup.9 A/cm.sup.2 to 110.sup.4 A/cm.sup.2 in a rated voltage V.sub.R.

A semiconductor device and a method for producing thereof is provided. The semiconductor device includes a plurality of device cells, each comprising a body region, a source region, and a gate electrode adjacent to the body region and dielectrically insulated from the body region by a gate dielectric; and an electrically conductive gate layer comprising the gate electrodes or electrically connected to the gate electrodes of the plurality of device cells. The gate layer is electrically connected to a gate conductor and includes at least one of an increased resistance region and a decreased resistance region.