A solid-state imaging device includes, in a semiconductor substrate, a pixel portion provided with a photoelectric conversion portion, which photoelectrically converts incident light to obtain an electric signal and a peripheral circuit portion disposed on the periphery of the pixel portion, wherein a gate insulating film of aMOS transistor in the peripheral circuit portion is composed of a silicon oxynitride film, a gate insulating film of aMOS transistor in the pixel portion is composed of a silicon oxynitride film, and an oxide film is disposed just above the photoelectric conversion portion in the pixel portion.

Embodiments relate to photodetectors comprising: a substrate and a bulk-alloy infrared (IR) photo absorption layer disposed on the substrate to absorb photons in an infrared wavelength and having a graded section and an ungraded section. The photodetector comprises a unipolar barrier layer disposed on the bulk-alloy photo absorption layer. The graded section includes a graded alloy composition such that its energy bandgap is largest near the substrate and smallest near the unipolar barrier layer. The embodiments also relate to methods fabricating the photodetectors.

Provided is a method of fabricating an image sensor device. An exemplary includes forming a plurality of radiation-sensing regions in a substrate. The substrate has a front surface, a back surface, and a sidewall that extends from the front surface to the back surface. The exemplary method further includes forming an interconnect structure over the front surface of the substrate, removing a portion of the substrate to expose a metal interconnect layer of the interconnect structure, and forming a bonding pad on the interconnect structure in a manner so that the bonding pad is electrically coupled to the exposed metal interconnect layer and separated from the sidewall of the substrate.

Disclosed is a solid-state imaging device including: a solid-state imaging element which outputs an image signal according to an amount of light sensed on a light sensing surface; a semiconductor element which performs signal processing with respect to the image signal output from the solid-state imaging element; and a substrate which is electrically connected to the solid-state imaging element and the semiconductor element, in which the semiconductor element is sealed by a molding resin in a state of being accommodated in an accommodation area which is provided on the substrate, and in which the solid-state imaging element is layered on the semiconductor element via the molding resin.

An imaging module includes: a chip size package having an image sensor that has a light receiving unit on a front side of the image sensor, the chip size package having connection lands on a back side of the image sensor; a circuit board having connection electrodes being electrically and mechanically connected to the connection lands of the chip size package through bumps; and an underfill material filled into a gap between the chip size package and the circuit board. The circuit board and the underfill material are provided within a projection plane on which the chip size package is projected in an optical axis direction of the image sensor. The circuit board has a cutout portion on a side surface thereof orthogonal to a connection surface of the circuit board with the chip size package such that the cutout portion is open to at least the connection surface.

In some embodiments, the present disclosure relates to an image sensor including a substrate having a first side and a second side opposite the first side; a photodetector region within the substrate; a gate structure on the first side of the substrate over the photodetector region; a deep trench isolation (DTI) structure surrounding the photodetector region and extending from the first side of the substrate to the second side; a doped floating node region within the substrate at the first side and disposed between the gate structure and the DTI structure; and a floating node on the first side of the substrate, contacting a top surface of the DTI structure and overlying the doped floating node region.

Implementations of semiconductor packages may include: a substrate having a first side and a second side and a die having an active area on a second side of the die. A first side of the die may be coupled to the second side of the substrate. The semiconductor package may also include a glass lid having a first side and a second side. The glass lid may be coupled over a second side of the die. The semiconductor package may include a first and a second molding compound and one or more cushions positioned between a first side of the glass lid and a portion of the first molding compound. The second molding compound may be coupled to the substrate and the around the die and the glass lid.

The present technique relates to an imaging device and an electronic device that can further suppress the occurrence of white spots and dark current.

The imaging device includes: a photoelectric conversion region including a first semiconductor region containing a first impurity and a second semiconductor region containing a second impurity; and a layer region including at least a first layer containing a high concentration of the first impurity and a second layer made of a predetermined material on a light incident surface side of the photoelectric conversion region. The imaging device further includes a pixel array part including the photoelectric conversion region disposed therein in an array form; and a pixel peripheral part including a processing unit that is disposed therein and processes a signal from the pixel array part. The pixel peripheral part is provided with a layer region not including the first layer. The present technique is applicable to, for example, an imaging device such as an image sensor.

A semiconductor device with an image sensor and a method of fabricating the same are disclosed. The semiconductor device includes a substrate, a pixel region with a pixel structure, an isolation region with an isolation structure disposed adjacent to the pixel region, and a contact pad region with a pad structure disposed adjacent to the isolation region. The pixel structure includes an epitaxial structure, which includes an embedded portion with a stepped structure disposed in the substrate and a protruding portion extending above a top surface of the substrate. The pixel structure further includes a capping layer disposed on the protruding portion.

A semiconductor device has a first semiconductor die and second semiconductor die with a conductive layer formed over the first semiconductor die and second semiconductor die. The second semiconductor die is disposed adjacent to the first semiconductor die with a side surface and the conductive layer of the first semiconductor die contacting a side surface and the conductive layer of the second semiconductor die. An interconnect, such as a conductive material, is formed across a junction between the conductive layers of the first and second semiconductor die. The conductive layer may extend down the side surface of the first semiconductor die and further down the side surface of the second semiconductor die. An extension of the side surface of the first semiconductor die can interlock with a recess of the side surface of the second semiconductor die. The conductive layer extends over the extension and into the recess.