A light emitting device, includes: a substrate; a light emitting element on the substrate, the light emitting element having a first end portion and a second end portion arranged in a longitudinal direction; one or more partition walls disposed on the substrate, the one or more partition walls being spaced apart from the light emitting element; a first reflection electrode adjacent the first end portion of the light emitting element; a second reflection electrode adjacent the second end portion of the light emitting element; a first contact electrode connected to the first reflection electrode and the first end portion of the light emitting element; an insulating layer on the first contact electrode, the insulating layer having an opening exposing the second end portion of the light emitting element and the second reflection electrode to the outside; and a second contact electrode on the insulating layer.

Provided are an ultraviolet light-emitting element that enables high light emission output and a method of producing the same. The light-emitting element (100) includes, in stated order: an n-type semiconductor layer (3) formed of Al.sub.xGa.sub.1-xN having an Al composition ratio x; a quantum well-type light-emitting layer (4); a p-type electron blocking layer (6) formed of Al.sub.yGa.sub.1-yN having an Al composition ratio y; a p-type cladding layer (7) formed of Al.sub.zGa.sub.1-zN having an Al composition ratio z; and a p-type GaN contact layer (8). The p-type electron blocking layer (6) has an Al composition ratio y of 0.35 to 0.45 and a thickness of 11 nm to 70 nm. The total thickness of the p-type electron blocking layer (6) and p-type cladding layer (7) is 73 nm to 100 nm. The thickness of the p-type GaN contact layer (8) is 5 nm to 15 nm.

The invention disclosed a preparation method for a high-voltage LED device integrated with a pattern array, comprising the following process steps: providing a substrate, and forming a N-type GaN limiting layer, an epitaxial light-emitting layer and a P-type GaN limiting layer on the substrate in sequence; isolating the N-GaN limiting layer, the epitaxial light-emitting layer and the P-GaN limiting layer on the substrate into at least two or more independent pattern units by means of photo lithography and etching process, wherein each of the pattern unit is in a triangular shape, and very two adjacent pattern units are arranged in an opposing and crossed manner to form a quadrangle, and the quadrangles formed by a plurality of adjacent pattern units are distributed in array; and connecting each pattern unit with metal wires to form a series connection and/or a parallel connection, thereby forming a plurality of interconnected LED chips. For the purpose of improving the current distribution so as to increase the luminescent efficiency of the device, a current blocking layer is also arranged beneath the P-type metal contact of each unit; in addition, an insulation material is also arranged to cover the surface of the chip so as to achieve the purposes of protecting the chip and increasing the light extraction efficiency of the chip.

A light emitting diode (LED) includes a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on a portion of the first semiconductor layer, a second semiconductor layer disposed on the active layer, a first conductive layer disposed on a portion of the first semiconductor layer, a second conductive layer disposed on the second semiconductor layer, and an insulating layer overlapping the first semiconductor layer, the second semiconductor layer, and the reflection pattern, in which the insulating layer has a first region having different thicknesses and a second region having a substantially constant thickness.

This invention relates to a flip-chip light-emitting diode and a method for manufacturing the same. The flip-chip light-emitting diode comprises a packaging body and a conductor layer. At least one light-emitting diode chip is encapsulated in the packaging body. The light emitting diode chip has a positive electrode and a negative electrode which are exposed on a side surface of the packaging body. The conductor layer is disposed on the side surface of the packaging body and directly in contact with the positive electrode and the negative electrode of the light-emitting diode chip. The conductor layer has circuit patterns and an insulating portion insulating the positive electrode and the negative electrode of the light-emitting diode chip from each other.

Disclosed are a light emitting diode and a light emitting diode module. The light emitting diode module includes a printed circuit board and a light emitting diode joined thereto through a solder paste. The light emitting diode includes a first electrode pad electrically connected to a first conductive type semiconductor layer and a second electrode pad connected to a second conductive type semiconductor layer, wherein each of the first electrode pad and the second electrode pad includes at least five pairs of Ti/Ni layers or at least five pairs of Ti/Cr layers and the uppermost layer of Au. Thus a metal element such as Sn in the solder paste is prevented from diffusion so as to provide a reliable light emitting diode module.

A method for manufacturing a light emitting unit is provided. A semiconductor structure including a plurality of light emitting dice separated from each other is provided. A molding compound is formed to encapsulate the light emitting dice. Each of the light emitting dice includes a light emitting element, a first electrode and a second electrode. A patterned metal layer is formed on the first electrodes and the second electrodes of the light emitting dice. A substrate is provided, where the molding compound is located between the substrate and the light emitting elements of the light emitting dice. A cutting process is performed to cut the semiconductor structure, the patterned metal layer, the molding compound and the substrate so as to define a light emitting unit with a series connection loop, a parallel connection loop or a series-parallel connection loop.

Diode includes first metal layer, coupled to p-type III-N layer and to first terminal, has a substantially equal lateral size to the p-type III-N layer. Central portion of light emitting region on first side and first metal layer includes first via that is etched through p-type portion, light emitting region and first part of n-type III-N portion. Second side of central portion of light emitting region that is opposite to first side includes second via connected to first via. Second via is etched through second part of n-type portion. First via includes second metal layer coupled to intersection between first and second vias. Electrically-insulating layer is coupled to first metal layer, first via, and second metal layer. First terminals are exposed from electrically-insulating layer. Third metal layer including second terminal is coupled to n-type portion on second side of light emitting region and to second metal layer through second via.

A contact to a semiconductor heterostructure is described. In one embodiment, there is an n-type semiconductor contact layer. A light generating structure formed over the n-type semiconductor contact layer has a set of quantum wells and barriers configured to emit or absorb target radiation. An ultraviolet transparent semiconductor layer having a non-uniform thickness is formed over the light generating structure. A p-type contact semiconductor layer having a non-uniform thickness is formed over the ultraviolet transparent semiconductor layer.

A light emitting diode includes a first electrode, a second electrode, and an epitaxial structure. The epitaxial structure is arranged on the first electrode, and electrically connects with the first electrode and the second electrode. The second electrode surrounds periphery of the epitaxial structure to reflect light from the epitaxial structure out from the top of the epitaxial structure. A method for manufacturing the light emitting diode is also presented. The light emitting diode and the method increase lighting efficiency of the light emitting diode.