An array substrate is provided. In the array substrate, an organic material layer includes a first planar portion, a bending portion and a second planar portion which are connected in sequence. The first planar portion and the second planar portion are disposed on both sides of a base substrate. A lead structure includes a first lead portion, a bent lead portion and a second lead portion which are connected in sequence, wherein the first lead portion is disposed outside the first plane portion, the bent lead portion is disposed outside the bending portion, and the second lead portion is disposed outside the second plane portion. An LED layer and a control circuit are respectively disposed on the both sides of the base substrates.

A light emitting element package includes a first substrate, at least one light emitting element, an encapsulation layer, and a plurality of conductive pads. The first substrate has an upper surface and a lower surface opposite to each other, in which an edge of the lower surface has a notch. The at least one light emitting element is disposed on the upper surface of the first substrate, in which the light emitting element has a positive electrode and a negative electrode. The encapsulation layer covers the light emitting element. The plurality of conductive pads are disposed on the lower surface of the first substrate and electrically connected to the positive electrode and the negative electrode of the light emitting element, respectively.

Solid-state transducer (SST) dies and SST arrays having electrical cross-connections are disclosed herein. An array of SST dies in accordance with a particular embodiment can include a first terminal, a second terminal and a plurality of SST dies coupled between the first and second terminals with at least a pair of the SST dies being coupled in parallel. The plurality of SST dies can individually include a plurality of junctions coupled in series with an interconnection between each individual junction. Additionally, the individual SST dies can have a cross-connection contact coupled to the interconnection. In one embodiment, the array can further include a cross-connection between the cross-connection contacts on the pair of the SST dies.

Provided is a method of fabricating a semiconductor package. The method of fabricating the semiconductor package include preparing a lower element including a lower substrate, a lower electrode, an UBM layer, and a reducing agent layer, providing an upper element including an upper substrate, an upper electrode, and a solder bump layer, providing a pressing member on the upper substrate to press the upper substrate to the lower substrate, and providing a laser beam passing through the pressing member to bond the upper element to the lower element.

Provided are a full-color LED structure and a preparation method of a full-color LED structure. The full-color LED structure includes a first substrate, first-color light-emitting units, second-color light-emitting units, and third-color light-emitting units. The first-color light-emitting units and the second-color light-emitting units are disposed on a side of the first substrate, disposed in the same layer, and simultaneously prepared. The third-color light-emitting units are disposed on the side of the first-color light-emitting units and the second-color light-emitting units facing away from the first substrate, where a vertical projection of a third-color light-emitting unit on the first substrate does not overlap a vertical projection of a first-color light-emitting unit on the first substrate or a vertical projection of a second-color light-emitting unit on the first substrate.

A light-emitting chip, a light board, and a method of assembling the light-emitting chip are disclosed. The light-emitting chip includes a first chip, a second chip, and a third chip. The second chip includes a first side and a second side. The first side includes a first protrusion. The second side includes a second protrusion. The first chip includes a first groove. The third chip includes a second groove. The first chip is disposed on the first side, and the first groove is mated with the first protrusion. The third chip is disposed on the second side, and the second groove is mated with the second protrusion. The first chip and the third chip are symmetrically arranged about a central axis of the second chip so as to be combined to form the light-emitting chip.

A display device includes a bank pattern disposed on a substrate, a first electrode pattern disposed on the bank pattern, a light-emitting element disposed on the first electrode pattern to be electrically connected to the first electrode pattern, a second electrode pattern configured to cover the light-emitting element, an inorganic insulating layer configured to cover the bank pattern, the first electrode pattern, and the light-emitting element between the first electrode pattern and the second electrode pattern, and a diffusion layer which includes a plurality of diffusion particles and is in contact with the inorganic insulating layer.

A micro light emitting device, a display apparatus including the same, and a method of manufacturing the micro light emitting device are disclosed. The micro light emitting device includes a first type semiconductor layer; a light emitting layer provided on the first type semiconductor layer; a second type semiconductor layer provided on the light emitting layer; one or more first type electrodes provided on the second type semiconductor layer; one or more second type electrodes provided on the second type semiconductor layer and spaced apart from the one or more first type electrodes; and a bonding spread prevention portion provided between the one or more first type electrodes and the one or more second type electrodes.

The present invention relates to a display apparatus using, for example, a micro light emitting diode (LED), and a manufacturing method therefor, wherein the apparatus and method can be applied to a technical field related to display apparatuses. In order to achieve the above objective, a display apparatus according to an embodiment of the present invention comprises: a substrate on which a plurality of unit pixel areas are defined; a wiring electrode positioned on the substrate and positioned in each of the unit pixel areas; a light emitting device that has a device electrode electrically connected to the wiring electrode and is assembled in each of the unit pixel areas; and a coupling forming portion providing a coupling force by which the light emitting device is coupled to the unit pixel areas, wherein the coupling forming portion comprises: an active portion coupled to the light emitting device; and a coupling portion which forms a chemical bond with the active portion and is patterned on the substrate.

A light-emitting component includes a light-emitting unit and an electrically insulating layer. The light-emitting unit includes a first semiconductor layer, an active layer, and a second semiconductor layer, which are stacked on one another along a stacking direction in such order. The second semiconductor has a lower surface distal from the active layer. The electrically insulating layer is disposed to cover a first portion and to expose a second portion of the lower surface of the second semiconductor layer. A fluorine-containing region is formed in the second semiconductor layer. Methods for making the light-emitting component are also disclosed.