An optoelectronic semiconductor chip has a semiconductor body and a substrate on which the semiconductor body is disposed. The semiconductor body has an active region disposed between a first semiconductor layer of a first conductor type and a second semiconductor layer of a second conductor type. The first semiconductor layer is disposed on the side of the active region facing the substrate. The first semiconductor layer is electrically conductively connected to a first termination layer that is disposed between the substrate and the semiconductor body. An encapsulation layer is disposed between the first termination layer and the substrate and, in plan view of the semiconductor chip, projects at least in some regions over a side face which delimits the semiconductor body.

An embodiment of the invention discloses an optoelectronics system. The optoelectronic system includes an optoelectronic element having a top surface, a bottom surface, a plurality of lateral surfaces arranged between the top surface and the bottom surface, and a first electrode arranged on the bottom surface; a wavelength converting material covering a plurality of lateral surfaces; and a reflecting layer, formed on the wavelength converting material which is arranged on the top surface.

A light-emitting diode (LED) includes: an epitaxial structure having an upper and a lower surface, wherein the upper surface comprises a light-emitting surface; at least one insulating layer over the lower surface; and an electrode pad layer over the at least one insulating layer; wherein: the electrode pad layer comprises a P electrode region and an N electrode region; and the at least one insulating layer is configured to adjust a distribution of the P and N electrode regions over the electrode pad layer.

Aspects include Light Emitting Diodes that have a GaN-based light emitting region and a metallic electrode. The metallic electrode can be physically separated from the GaN-based light emitted region by a layer of porous dielectric, which provides a reflecting region between at least a portion of the metallic electrode and the GaN-based light emitting region.

According to one embodiment, the p-side electrode is provided on the second semiconductor layer. The insulating film is provided on the p-side electrode. The n-side electrode includes a first portion, a second portion, and a third portion. The first portion is provided on a side face of the first semiconductor layer. The second portion is provided in the first n-side region. The third portion overlaps the p-side electrode via the insulating film and connects the first portion and the second portion to each other.

The present disclosure provides a method of manufacturing a light-emitting device, which comprises providing a first substrate and a plurality of semiconductor stacked blocks on the first substrate, and each of the plurality semiconductor stacked blocks comprises a first conductive-type semiconductor layer, a light-emitting layer on the first conductive-type semiconductor layer, and a second conductive-type semiconductor layer on the light-emitting layer; wherein there is a trench separating two adjacent semiconductor stacked blocks on the first substrate, and a width of the trench is less than 10 m; and conducting a first separating step to separate a first semiconductor stacked block of the plurality of semiconductor stacked blocks from the first substrate and keep a second semiconductor stacked block on the first substrate.

An LED is provided to include: a first conductive type semiconductor layer; an active layer positioned over the first conductive type semiconductor layer; a second conductive type semiconductor layer positioned over the active layer; and a defect blocking layer comprising a masking region to cover at least a part of the top surface of the second conductive semiconductor layer and an opening region to partially expose the top surface of the second conductive type semiconductor layer, wherein the active layer and the second conductive type semiconductor layer are disposed to expose a part of the first conductive type semiconductor layer, and wherein the defect blocking layer comprises a first region and a second region surrounding the first region, and a ratio of the area of the opening region to the area of the masking region in the first region is different from a ratio of die area of the opening region to the area of the masking region in the second region.

A side-view type light emitting device has a bottom surface thereof as a light emission surface and a first lateral surface thereof as a mounting surface for mounting on a mounting substrate, and includes a semiconductor layered structure including a first semiconductor layer, an active layer and a second semiconductor layer; a first connecting electrode exposed from the first lateral surface and electrically connected to the first semiconductor layer; a first electrode disposed between the first semiconductor layer and the first connecting electrode; a second connecting electrode exposed from the first lateral surface; a metal wire electrically connecting an upper surface of the second semiconductor layer to the second connecting electrode; and a resin layer. In a direction perpendicular to the light emission surface, the active layer does not overlap with the first connecting electrode, and the active layer does not overlap with the second connecting electrode.

An LED die includes a substrate, a pre-growth layer, a first insulating layer and a light emitting structure. The pre-growth layer, the first insulating layer and the light emitting structure are formed on the structure that order. The substrate includes a first electrode, a second electrode and an insulating part. The insulating part is formed between the first electrode and the second electrode. The LED die further includes a second insulating layer and a metal layer which are formed around the pre-growth layer. The present disclosure includes a method for manufacturing the LED die.

Embodiments of the invention include a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A metal n-contact is connected to the n-type region. A metal p-contact is in direct contact with the p-type region. An interconnect is electrically connected to one of the n-contact and the p-contact. The interconnect is disposed adjacent to the semiconductor structure.