A semiconductor device according to one embodiment of the present disclosure includes a low resistance material section and a low thermal resistance material section. The low resistance material section is in contact with a barrier layer, a channel layer, and a source electrode or a drain electrode, and includes a low resistance material having a lower resistance than the channel layer. The low thermal resistance material section is in contact with the channel layer and the buffer layer, and includes a low thermal resistance material having a lower thermal resistance than the channel layer.

A member includes a buffer layer made of GaN. The member is characterized in that the member includes a source layer arranged on top of the buffer layer, and the source layer made of n-doped GaN. The member includes a first barrier layer made of AlGaN arranged over the buffer layer and a first gate layer made of p-doped GaN arranged over the first barrier layer, where the first barrier layer and the first gate layer are arranged adjacent the source layer on one side. The member includes a second barrier layer made of AlGaN arranged over the buffer layer and a second gate layer made of p-doped GaN arranged over the second barrier layer, where the second barrier layer and the second gate layer are arranged adjacent the source layer on another side. The member enables an independent optimization of the two-dimensional electron gas characteristics and the threshold voltage.

A laminate includes a group 13 nitride single crystal substrate composed of a group 13 nitride single crystal and having a first main face and a second main face, a buffer layer provided on the first main face of the group 13 nitride single crystal substrate, a channel layer provided on the buffer layer and a barrier layer provided on the channel layer. The channel layer has a thickness of 700 nm or smaller, and the first main face of the group 13 nitride single crystal substrate has an off-angle of 0.4 or more and 1.0 or less.

A laminate includes a structure in which a Si (111) substrate, an oxygen-containing aluminum nitride film, and a gallium nitride film are laminated. The laminate is obtained by a production method for a laminate that is characterized by having a structure in which a Si (111) substrate, an oxygen-containing aluminum nitride film, and a gallium nitride film are laminated, the production method having: an AlN film-formation step in which an aluminum nitride film is formed on the Si (111) substrate and an Si substrate including an aluminum nitride film is obtained; an oxidation step in which the Si substrate including the aluminum nitride film is treated in an oxidizing atmosphere and a Si substrate including an oxygen-containing aluminum nitride film is obtained; and a GaN film-formation step in which a gallium nitride film is formed on the Si substrate including the oxygen-containing aluminum nitride film.

A nitride semiconductor device includes an electron transit layer, an electron supply layer, a gate layer containing acceptor impurities, a gate electrode, a passivation layer, a source electrode, a drain electrode, and a field plate electrode. The field plate electrode is located on the passivation layer between the gate layer and the drain electrode. The gate layer includes a ridge where the gate electrode is located, a source-side extension extending from the ridge, and a drain-side extension extending from the ridge to a side opposite to the source-side extension. The passivation layer includes a field plate non-overlapping region that does not overlap the field plate electrode and is located immediately above the drain-side extension.

The present invention provides an AlGaN/GaN power HEMT device and a preparation method therefor. The device comprises: an n-type GaN substrate, a first p-type GaN layer, an AlGaN layer, a hole-injection-type PN junction layer and a gate structure, wherein the gate structure penetrates the hole-injection-type PN junction layer, the AlGaN layer and the first p-type GaN layer and stops in the n-type GaN substrate, and comprises a gate metal aluminum layer and a gate silicon dioxide layer; and the hole-injection-type PN junction layer comprises a second p-type GaN layer and a second n-type GaN layer, which are distributed in the horizontal direction, and the second n-type GaN layer is located on the side close to the gate structure.

A HEMT device including: a semiconductor body forming a heterostructure; a gate region on the semiconductor body and elongated along a first axis; a gate metal region including a lower portion on the gate region and recessed with respect to the gate region, and a upper portion on the lower portion and having a width greater that the lower portion along a second axis; a source metal region extending on the semiconductor body and made in part of aluminum; a drain metal region on the semiconductor body, the source metal region and the drain metal region on opposite sides of the gate region; a first conductivity enhancement region of aluminum nitride, extending on the semiconductor body and interposed between the source metal region and the gate region, the first conductivity enhancement region being in direct contact with the source metal region and being separated from the gate region.

A semiconductor structure includes a supporting substrate, a buried layer, a growth substrate, a buffer layer, and a heterojunction structure layer that are sequentially stacked; a plurality of recesses are disposed on a side, away from the supporting substrate, of the growth substrate, and the buffer layer completely covers a surface of the growth substrate. In the present disclosure, the recesses are disposed in the growth substrate, so that a parasitic circuit formed in the growth substrate caused by a radio frequency signal may be blocked, to reduce a disturbance effect of the growth substrate, thereby reducing an RF loss; and the buffer layer is formed, by using epitaxial lateral overgrowth, in the recesses of the growth substrate, so that dislocation density in an epitaxial layer may be greatly reduced, to improve crystal quality, thereby improving characteristics such as electron mobility, breakdown voltage, and leakage current of a device.

A high electron mobility transistor (HEMT) includes a GaN epi-layer, a first passivation layer, a source electrode metal, a drain electrode metal, a gate electrode metal, and a field plate. The first passivation layer is deposited on the GaN epi-layer. The source electrode metal, the drain electrode metal, and the gate electrode are recessed into the first passivation layer and deposited on the GaN epi-layer. The source electrode metal has a source field plate with a source field plate length Lsf. The drain electrode metal has a drain field plate with a drain field plate length Ldf, wherein Ldf>Lsf. The gate electrode is situated between the source electrode metal and the drain electrode metal. The field plate is situated between the gate electrode and the drain electrode metal.

The present disclosure generally relates to integrated devices with a conductive barrier structure. In an example, a semiconductor device includes a substrate, a conductive barrier structure, a channel layer, a barrier layer, a gate, and a conductive structure. The substrate is of a first semiconductor material. The conductive barrier structure is on the substrate. The channel layer is of a second semiconductor material and is on the conductive barrier structure. The barrier layer is on the channel layer, and the channel layer is between the barrier layer and the conductive barrier structure. The gate is over the barrier layer opposing the channel layer. The conductive structure is electrically coupled between the conductive barrier structure, the channel layer, and the barrier layer.