A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.

A semiconductor device includes a GaN FET on a silicon substrate and a buffer layer of III-N semiconductor material, with a columnar region, a transition region surrounding the columnar region, and an inter-columnar region around the transition region. The columnar region is higher than the inter-columnar region. The GaN FET includes a gate of III-N semiconductor material with a thickness greater than twice the vertical range of the top surface of the buffer layer in the columnar region. A difference between the gate thickness over the columnar region and over the transition region is less than half of the vertical range of the top surface of the buffer layer in the columnar surface. The semiconductor device may be formed by forming a gate layer of III-N semiconductor material over the barrier layer by a gate MOVPE process using a carrier gas that includes zero to 40 percent hydrogen gas.

According to one embodiment, a nitride semiconductor includes a base body, a nitride member, and an intermediate region provided between the base body and the nitride member. The nitride member includes a first nitride region including Al.sub.x1Ga.sub.1-x1N (0<x11), and a second nitride region including Al.sub.x2Ga.sub.1-x2N (0x2<1, x2<x1). The first nitride region is between the intermediate region and the second nitride region. The intermediate region includes nitrogen and carbon. A concentration of carbon in the intermediate region is not less than 1.510.sup.19/cm.sup.3 and not more than 610.sup.20/cm.sup.3.

In an embodiment, a Group III nitride-based transistor device includes a first passivation layer arranged on a first major surface of a Group III nitride-based layer, a second passivation layer arranged on the first passivation layer, a source ohmic contact, a drain ohmic contact and a gate positioned on the first major surface of a Group III nitride-based layer, and a field plate, the field plate being laterally arranged between and spaced apart from the gate and the drain ohmic contact.

A high electron mobility transistor includes a substrate, a semiconductor channel layer, a semiconductor barrier layer, a gate field plate, a source electrode, at least one first field plate, and a second field plate. The gate field plate is disposed on the semiconductor barrier layer. The source electrode is disposed on one side of the gate field plate, and the first field plate is disposed on the other side of the gate field plate and laterally spaced apart from the gate field plate. The second field plate covers the gate field plate and the first field plate and is electrically connected to the source electrode, where the area of the second field plate is larger than the sum of the area of the gate field plate and the area of the first field plate when perceived from a top-down perspective.

A transistor structure that includes multiple heterojunction layer sets, each generating a two-dimensional electron gas (2DEG), such that the transistor structure has a stack of 2DEGs that may be used to conduct between source and drain. A terminal is provided proximate an uppermost 2DEG to control whether the uppermost 2DEG is continuous between a source contact and a source plug. A source plug connects the uppermost 2DEG with the next 2DEG, and a drain plug also connects the uppermost 2DEG with the next 2DEG. Thus, the gate terminal may control the flow of current in sub-surface 2DEGs between the source and drain.

A GaN epitaxial substrate contains a GaN substrate and a GaN buffer layer epitaxially grown on the GaN substrate. The GaN epitaxial substrate includes a point A and a point B positioned on a straight line parallel to a [0001] axis passing through the point A, the point B being present in a [0001] axis direction relative to the point A. The point A is present in the GaN substrate or the GaN buffer layer, the point B is present in the GaN buffer layer, a ratio ([Mn].sub.B/[Mn].sub.A) is 1/100, and a distance between the point A and the point B is 0.7 m or less.

A GaN substrate doped with manganese, in which an activation energy of a carrier is 0.7 eV or more when a carrier concentration is represented by the formula (I): carrier concentration (atoms/cm.sup.3)=AEXP(Ea/kT). In the formula (I), A represents a proportional constant, EXP represents an exponential function, Ea represents a carrier activation energy (eV), k represents a Boltzmann constant (8.61710.sup.5 eV/K), and T represents a temperature (K) in Kelvin units.

Transistor devices having metal structures with rounded corners are provided. In one example, The transistor device includes a Group III-nitride semiconductor structure. The transistor device includes a gate contact and/or a field plate on the Group III-nitride semiconductor structure. One or more of the gate contact or the field plate includes at least one rounded corner.

A nitride semiconductor module includes a chip including at least one transistor, wherein the chip includes: a semiconductor substrate including a substrate upper surface and a substrate lower surface facing an opposite side of the substrate upper surface; an electron transit layer formed over the substrate upper surface of the semiconductor substrate and made of GaN; and an electron supply layer formed over the electron transit layer and made of GaN having a larger band gap than the electron transit layer, wherein the at least one transistor includes a gate electrode, a source electrode, and a drain electrode, which are formed over the electron supply layer, and wherein the semiconductor substrate is a GaN substrate having a thickness of 100 m or less.