Circuits, structures and techniques for independently connecting a surrounding material in a part of a semiconductor device to a contact of its respective device. To achieve this, a combination of one or more conductive wells that are electrically isolated in at least one bias polarity are provided.

A III-N enhancement-mode transistor includes a III-N structure including a conductive channel, source and drain contacts, and a gate electrode between the source and drain contacts. An insulator layer is over the III-N structure, with a recess formed through the insulator layer in a gate region of the transistor, with the gate electrode at least partially in the recess. The transistor further includes a field plate having a portion between the gate electrode and the drain contact, the field plate being electrically connected to the source contact. The gate electrode includes an extending portion that is outside the recess and extends towards the drain contact. The separation between the conductive channel and the extending portion of the gate electrode is greater than the separation between the conductive channel and the portion of the field plate that is between the gate electrode and the drain contact.

A nitride semiconductor device includes a conductive substrate and a nitride semiconductor layer. The nitride semiconductor layer is disposed on the conductive substrate. The nitride semiconductor layer includes a first transistor structure of a lateral type and a second transistor structure of a lateral type. The conductive substrate includes a first potential control region and a second potential control region capable of controlling potential independently from the first potential control region. In planar view of the nitride semiconductor layer, the first transistor structure overlaps the first potential control region and the second transistor structure overlaps the second potential control region.

A semiconductor device includes: a substrate; a first nitride semiconductor layer on the substrate; a second nitride semiconductor layer on the first nitride semiconductor layer; a drain contact and a source contact on the second nitride semiconductor layer; a common contact on the second nitride semiconductor layer and between the drain contact and source contact; a first gate structure on the second nitride semiconductor layer and between the drain contact and common contact; a second gate structure on the second nitride semiconductor layer and between the common contact and source contact; a conductive wire on the source contact; a dielectric layer on the second nitride semiconductor layer and covering a portion of a lateral surface of the conductive wire; and a conductive via connected to the conductive wire, extending through a portion of the dielectric layer, the second nitride semiconductor layer, and the first nitride semiconductor layer to the substrate.

Devices and methods to manufacture a stack of FET switches in presence of a neighboring stack of FET switches are described. The stack of FET switches is designed or manufactured so that at least its top FET has a width that is smaller than the width of its bottom FET. Other voltage handling configurations and distributions of widths are described.

Devices and methods to manufacture a stack of FET switches in presence of a neighboring stack of FET switches are described. The stack of FET switches is designed or manufactured so that at least its top FET has a width that is smaller than the width of its bottom FET. Other voltage handling configurations and distributions of widths are described.

Apparatus and circuits with dual threshold voltage transistors and methods of fabricating the same are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a substrate; a first layer comprising a first III-V semiconductor material formed over the substrate; a first transistor formed over the first layer, and a second transistor formed over the first layer. The first transistor comprises a first gate structure comprising a first material, a first source region and a first drain region. The second transistor comprises a second gate structure comprising a second material, a second source region and a second drain region. The first material is different from the second material.

A set of transistor elements includes a substrate of a first doping type and a first well and a second well, both of a second doping type and both formed on the substrate. The set of transistor elements also includes a first complementary transistor cell and a second complementary transistor cell. The set of transistor element also includes an anti-propagation region of the first doping type between the first well and the second well.

A set of transistor elements includes a substrate of a first doping type and a first well and a second well, both of a second doping type and both formed on the substrate. The set of transistor elements also includes a first complementary transistor cell and a second complementary transistor cell. The set of transistor element also includes an anti-propagation region of the first doping type between the first well and the second well.

A microelectronic device that is radiation hardened through the incorporation of a quantum structure getter (QSG) is provided. The device, such as a field effect transistor (FET) includes a conductive channel and a material stack comprising: a capping layer, one or more barrier layers comprising a high band gap, one or more quantum structures comprising a small band gap, and a substrate. The quantum structures are positioned in close proximity to the conductive channel to form a quantum well charge getter. The getter forms a low energy area beneath the FET, which traps and confines electron-hole pair wave functions produced from ionizing radiation, causing the wave functions overlap, recombine, and produce light emission. The quantum structures getter the wave functions, which reduces the ionized photocurrent that reaches the conducting channel, thereby hardening the microelectronic device against ionizing radiation.