A vertically stacked heterostructure device includes: (1) a substrate; and (2) vertically stacked layers disposed over the substrate and including (a) a source electrode including a layer of graphene; (b) a drain electrode; and (c) a semiconducting channel disposed between the source electrode and the drain electrode. During operation of the device, a current is configured to flow between the source electrode and the drain electrode through the semiconducting channel.

This invention relates to a method for producing a photodetector based on the deposition of precursor system having a liquid phase. The photodetectors are characterized by a certain group of semiconductor materials which can be used as the absorber in solar-blind UV detectors. A facile route for the formation of thin layers of such absorber materials is disclosed.

In the present disclosure, disclosed are a novel compound semiconductor which can be used as a thermoelectric material or the like, and applications thereof. A compound semiconductor according to the present disclosure can be represented by the following chemical formula 1: <Chemical formula 1>[Bi.sub.1xM.sub.xCu.sub.uwT.sub.wO.sub.ayQ1.sub.yTe.sub.bSe.sub.z]A.sub.c, where, in the chemical formula 1, M is one or more elements selected from the group consisting of Ba, Sr, Ca, Mg, Cs, K, Na, Cd, Hg, Sn, Pb, Mn, Ga, In, Tl, As and Sb; Q1 is one or more elements selected from the group consisting of S, Se, As and Sb; T is one or more elements selected from transition metal elements; A is one or more elements selected from the group consisting of transition metal elements and compounds of transition metal elements and group VI elements; and 0x<1, 0.5u1.5, 0<w1, 0.2<a<1.5, 0y<1.5, 0b<1.5, 0z<1.5 and 0<c<0.2.

Disclosed are methods for the surface cleaning and passivation of PV absorbers, such as CdTe substrates usable in solar cells, and devices made by such methods. In some embodiments, the method involves an anode layer ion source (ALIS) plasma discharge process to clean and oxidize a CdTe surface to produce a thin oxide layer between the CdTe layer and subsequent back contact layer(s).

The present specification provides a copolymer and an organic solar cell including the same.

A PV module includes a transparent substrate, a first solar cell unit, a crystalline silicon solar cell, and a spacer. The first solar cell unit is between the transparent substrate and the crystalline silicon solar cell, and the first solar cell unit includes a first electrode, a second electrode, and a I-III-VI semiconductor layer between the first electrode and the second electrode. The I-III-VI semiconductor layer includes at least gallium (Ga) and sulfur (S), and the energy gap thereof is more than that of crystalline silicon. Moreover, the crystalline silicon solar cell and the first solar cell unit are separated by the spacer.

A method of producing a thin film transistor includes: forming a gate electrode; forming a gate insulating film that contacts the gate electrode; forming, by a liquid phase method, an oxide semiconductor layer arranged facing the gate electrode with the gate insulating film provided therebetween, the oxide semiconductor layer including a first region and a second region, the first region being represented by In.sub.(a)Ga.sub.(b)Zn.sub.(c)O.sub.(d), the second region being represented by In.sub.(e)Ga.sub.(f)Zn.sub.(g)O.sub.(h), and the second region being located farther from the gate electrode than the first region; and forming a source electrode and a drain electrode that are arranged apart from each other and are capable of being conductively connected through the oxide semiconductor layer.

a p-type amorphous oxide semiconductor including gallium, a method of manufacturing the same, a solar cell including the same and a method of manufacturing the solar cell are disclosed. The p-type oxide semiconductor where gallium (Ga) is further combined with combination of one or more components selected from a group of CuS, SnO, ITO, IZTO, IGZO and IZO is provided.

The present disclosure relates to a solar cell that includes a first layer that includes a semiconductor and a second layer that includes at least one of an oxide, a carbide, a nitride, a fluoride, and/or a sulfide, where the second layer covers a surface of the first layer, the second layer has a thickness between about 400 nm and about 10 m, and the solar cell retains at least 95% of a starting power-conversion-efficiency (PCE) after exposure to a proton fluence of about 1E15 cm.sup.2 for protons having an energy between greater than zero KeV per proton and less than or equal to 0.05 KeV per proton.

A field effect transistor including a substrate; a monolayer of a single crystal semiconducting transition metal dichalcogenide (TMD) on the substrate; a source contact and a drain contact to the strained monolayer; and a gate contact on the substrate; wherein the a gate voltage applied to the gate contact with respect to the source contact modulates a ferroelectric response of the monolayer when strained and a current through the monolayer between the source contact and the drain contact; and wherein the substrate is rigid and the monolayer experiences asymmetric lattice expansion when strained against the rigid substrate in response to an external magnetic field or the substrate is a strain engineered substrate inducing asymmetric lattice expansion of the monolayer.