The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.

An organic light-emitting display device includes a plurality of pixels, each of which includes an organic light-emitting device including a pixel electrode, an organic emission layer, and an opposing electrode; a pixel defining layer covering an edge of the pixel electrode and being configured to define a light-emission region by having an opening which exposes a portion of the pixel electrode; and a reference line overlapping the pixel electrode with an insulating layer between the reference line and the pixel electrode and extending in a first direction. The reference line overlaps with a center point of the opening, and the opening is shifted to one side of the pixel electrode in a second direction perpendicular to the first direction.

Provided are a display panel and a display device. The display panel includes a base substrate, a first transistor, and a planarization layer. The first transistor includes a first active layer, a first gate, a first source, and a first drain. The planarization layer is located above the first source. In the direction perpendicular to the base substrate, at least one insulating layer and a first organic area are provided between the film layer where the first active layer is located and the planarization layer. An insulating layer in the first organic area is made of organic material and the first organic area is located in a display area.

An active matrix substrate includes a substrate, a pixel TFT that is supported by the substrate, provided corresponding to each of a plurality of pixel areas, and includes an oxide semiconductor layer, an organic insulating layer disposed above at least the oxide semiconductor layer of the pixel TFT, and an inorganic insulating layer disposed in contact with an upper surface of the organic insulating layer on the organic insulating layer. The organic insulating layer and the inorganic insulating layer are provided with a plurality of dual-layer hole structure portions, each of the dual-layer hole structure portions includes a through-hole provided in the inorganic insulating layer and a bottomed hole provided in the organic insulating layer and positioned below the through-hole, and the through-hole is positioned on an inner side of an outer edge of the bottomed hole when viewed from a normal direction of the substrate.

Disclosed is a display device including a substrate and a plurality of pixels over the substrate. At least one of the plurality of pixels includes a driving transistor and a liquid crystal element electrically connected to the driving transistor. The liquid crystal element has a pixel electrode, an interelectrode insulating film, a common electrode, an inorganic insulating film, a first orientation film, a liquid crystal layer, and a second orientation film. The interelectrode insulating film is located over the pixel electrode. The common electrode is located over the interelectrode insulating film and has a slit overlapping the pixel electrode. The inorganic insulating film is located over the common electrode. The first orientation film is located over the inorganic insulating film. The liquid crystal layer is located over the first orientation film. The second orientation film is located over the liquid crystal layer.

A display device is disclosed. In one aspect, the display device includes a display area configured to display an image, a peripheral area neighboring the display area, and at least one test element group (TEG) including a test thin film transistor (TFT) formed in the peripheral area and a plurality of test pads electrically connected to the test TFT. The display device also includes first to third dummy circuits separated from the test TFT, each of the first to third dummy circuits including a plurality of first dummy semiconductor layers and a plurality of first dummy gate electrodes overlapping at least a portion of the first dummy semiconductor layers in the depth dimension of the display device.

An array substrate includes a substrate and a via on a side of the substrate. The via includes a first structure and a second structure surrounding the first structure, and the first structure has a light transmittance different from the second structure. An orthographic projection of the first structure on the substrate has a substantially rectangular shape with a plurality of straight sides. An orthographic projection of the second structure on the substrate has a substantially octagonal shape, the second structure includes a plurality of first sub-structures and a plurality of second sub-structures, an orthographic projection of each first sub-structure on the substrate has a strip shape, the first sub-structures are parallel to the straight sides of the first structure in one-to-one correspondence, and an orthographic projection of each second sub-structure on the substrate has a tile shape. Each second sub-structure is between, and connects, two adjacent first sub-structures.

A light emitting display device includes a pixel circuit unit, a data distribution unit, a plurality of signal generating units, a unit light emitting diode, and a dummy opening. The pixel circuit unit is configured to generate an output current. The data distribution unit is configured to apply a data voltage to the pixel circuit unit through a data line. The plurality of signal generating units are respectively configured to apply a scan signal and a light emission control signal to the pixel circuit unit through a plurality of signal lines. The unit light emitting diode is configured to receive the output current of the pixel circuit unit and is attached to the pixel circuit unit. The dummy opening is formed in the region where the pixel circuit unit, the data distribution unit, and a plurality of signal generating units are not positioned.

A display device may include first, second, and third sub-pixels. Each of the first, second, and third sub-pixels may include: a pixel circuit layer including first, second, and third transistors disposed on a substrate, and a bridge pattern disposed on a gate electrode of the first transistor and a source electrode of the second transistor, a first end of the bridge pattern is electrically connected to the source electrode of the second transistor and a second end of the bridge pattern is electrically connected to the gate electrode of the first transistor; first and second alignment electrodes disposed on the pixel circuit layer; and light emitting elements disposed on the first and second alignment electrodes and electrically connected to at least one of the first, second, and third transistors. The second alignment electrode may be supplied with a low potential voltage and overlap the bridge pattern in a plan view.

The embodiment of the present application discloses a display substrate, a display panel and a manufacturing method of the display substrate. The display substrate comprises a base substrate and a composite structure layer. The composite structure layer comprises a conductive layer and a colloidal medium layer. The colloidal medium layer comprises a plurality of conductive particles. The plurality of conductive particles are located at a position of the colloidal medium layer close to the conductive layer to form a conductive particle part. The present application can reduce the height difference between the conductive layer and the edge of the conductive particle part, and reduce the risk of fracture or breakdown.