A metal-oxide-semiconductor field-effect transistor (MOSFET) with integrated passive structures and methods of manufacturing the same is disclosed. The method includes forming a stacked structure in an active region and at least one shallow trench isolation (STI) structure adjacent to the stacked structure. The method further includes forming a semiconductor layer directly in contact with the at least one STI structure and the stacked structure. The method further includes patterning the semiconductor layer and the stacked structure to form an active device in the active region and a passive structure of the semiconductor layer directly on the at least one STI structure.

A chip part includes a substrate, an element formed on the substrate, and an electrode formed on the substrate. A recess and/or projection expressing information related to the element is formed at a peripheral edge portion of the substrate.

A thermal airflow sensor includes a semiconductor device, a protective film a bonding wire, and a resin. The resin covers over a part of the semiconductor device so that the bonding wire is covered with the resin and the region including a thin-wall portion is exposed. The protective film is not covered with the resin and has an outer peripheral edge located outside the thin-wall portion.

A method for making a semiconductor device may include forming a first dielectric layer above a semiconductor substrate, forming a first trench in the first dielectric layer, filling the first trench with electrically conductive material, removing upper portions of the electrically conductive material to define a lower conductive member with a recess thereabove, forming a filler dielectric material in the recess to define a second trench. The method may further include filling the second trench with electrically conductive material to define an upper conductive member, forming a second dielectric layer over the first dielectric layer and upper conductive member, forming a first via through the second dielectric layer and underlying filler dielectric material to the lower conductive member, and forming a second via through the second dielectric layer to the upper conductive member.

In one embodiment, a switching circuit includes a first switch comprising one or more transistors operably coupled in series with a first terminal, wherein each of the one or more transistors has a corresponding diode, a drain of each of the one or more transistors being operably coupled to a cathode of the corresponding diode; and a second switch comprising one or more transistors operably coupled in series with a second terminal, wherein each of the one or more transistors has a corresponding diode, a drain of each of the one or more transistors being operably coupled to a cathode of the corresponding diode; wherein a source of the one or more transistors of the first switch is operably coupled to a source of the one or more transistors of the second switch.

Methods of forming passive elements under a device layer are described. Those methods and structures may include forming at least one passive structure, such as a capacitor and a resistor structure, in a substrate, wherein the passive structures are vertically disposed within the substrate. An insulator layer is formed on a top surface of the passive structure, a device layer is formed on the insulator layer, and a contact is formed to couple a device disposed in the device layer to the at least one passive structure.

Electrical fuse (eFuse) and resistor structures and methods of manufacture are provided. The method includes forming metal gates having a capping material on a top surface thereof. The method further includes protecting the metal gates and the capping material during an etching process which forms a recess in a dielectric material. The method further includes forming an insulator material and metal material within the recess. The method further includes forming a contact in direct electrical contact with the metal material.

Electrical fuse (eFuse) and resistor structures and methods of manufacture are provided. The method includes forming metal gates having a capping material on a top surface thereof. The method further includes protecting the metal gates and the capping material during an etching process which forms a recess in a dielectric material. The method further includes forming an insulator material and metal material within the recess. The method further includes forming a contact in direct electrical contact with the metal material.

A three-dimensional production method for a functional element structure body according to the invention is a three-dimensional production method for a functional element structure body, which includes an electrical functional element section having a terminal and an insulating member provided on the periphery of the functional element section in a state where at least the terminal is exposed to the outside, and includes a layer formation step of forming one layer in a layer forming region by supplying a first flowable composition containing first particles for the functional element section from a first supply section, and supplying a second flowable composition containing second particles for the insulating member from a second supply section, a shaping step of shaping the functional element structure body by repeating the layer formation step, and a solidification step of performing solidification by applying energy to the first particles and the second particles in the layer.

Electrical fuse (eFuse) and resistor structures and methods of manufacture are provided. The method includes forming metal gates having a capping material on a top surface thereof. The method further includes protecting the metal gates and the capping material during an etching process which forms a recess in a dielectric material. The method further includes forming an insulator material and metal material within the recess. The method further includes forming a contact in direct electrical contact with the metal material.