The present application relates to a cured product and the use thereof. When the cured product, for example, is applied to a semiconductor device such as an LED or the like, the decrease in brightness may be minimized even upon the long-term use of the device, and since the cured product has excellent cracking resistance, the device having high long-term reliability may be provided. The cured product has excellent processability, workability, and adhesive properties or the like, and does not cause whitening and surface stickiness, etc. Further, the cured product exhibits excellent heat resistance at high temperature, gas barrier properties, etc. The cured product may be, for example, applied as an encapsulant or an adhesive material of a semiconductor device.

This disclosure describes various modules that can provide ultra-precise and stable packaging for an optoelectronic device such as a light emitter or light detector. The modules include vertical alignment features that can be machined, as needed, during fabrication of the modules, to establish a precise distance between the optoelectronic device and an optical element or optical assembly disposed over the optoelectronic device.

A flexible display includes a plurality of pixel chips, chixels, provided on a flexible substrate. The chixels and the light emitters thereon may be shaped, sized and arranged to minimize chixel, pixel, and sub-pixel gaps and to provide a desired bend radius of the display. The flexible substrate may include light manipulators, such as filters, light converters and the like to manipulate the light emitted from light emitters of the chixels. The light manipulators may be arranged to minimize chixel gaps between adjacent chixels.

High-performance light-emitting diode together with apparatus and method embodiments thereto are disclosed. The light emitting diode devices emit at a wavelength of 390 nm to 470 nm or at a wavelength of 405 nm to 430 nm. Light emitting diode devices are characterized by having a geometric relationship (e.g., aspect ratio) between a lateral dimension of the device and a vertical dimension of the device such that the geometric aspect ratio forms a volumetric light emitting diode that delivers a substantially flat current density across the device (e.g., as measured across a lateral dimension of the active region). The light emitting diode devices are characterized by having a current density in the active region of greater than about 175 Amps/cm.sup.2.

A light-emitting diode package includes a frame portion with a chip-mounting region defined in an upper portion thereof, and first and second frames spaced apart from each other. A light-emitting diode is mounted on at least a portion of the chip-mounting region with a bonding layer interposed therebetween. The frame portion includes a depressed portion formed on an upper surface thereof, and the depressed portion includes the chip-mounting region defined on a bottom thereof. The depressed portion also includes a step portion disposed at an outer upper end thereof.

A light-emitting-device package according to one aspect of the present invention includes: a metal substrate; a light emitting device disposed on a first surface of the metal substrate and configured to emit at least ultraviolet light; a pair of electrodes disposed to be spaced apart from each other on at least the first surface of the metal substrate, and electrically connected to the light emitting device; and an insulating layer provided between the metal substrate and the pair of electrodes. UV reflectance of the first surface of the metal body is higher than UV reflectance of the pair of electrodes.

A light emitting diode chip includes an epitaxial layer with a plurality of recess portions and protrusion portions over the top layer; a light transmission layer, located between top ends of adjacent protrusion portions and forming holes with the recess portions. The light transmission layer has a horizontal dimension larger than a width of the top ends of two adjacent protrusion portions, and serves as current blocking layer; a current spreading layer covering the surface of the light transmission layer and the surface of an epitaxial layer of a non-mask light transmission layer. As the refractive index of the light transmission layer is between those of the epitaxial layer and the hole, indicating a difference of refractive index between the light transmission layer and the epitaxial layer, the probability of scattering generated when light from a luminescent layer emits upwards can be increased, thus avoiding light absorption by electrodes and improving light extraction efficiency.

The light emitting device includes the cap including the ultraviolet light transmitting part made of glass for transmitting ultraviolet light. In the light emitting device, the first electrode of the ultraviolet light emitting element and the first conductor of the mounting substrate are bonded with the first bond made of AuSn, the second electrode of the ultraviolet light emitting element and the second conductor of the mounting substrate are bonded with the second bond made of AuSn, and the first bonding metal layer of the mounting substrate and the second bonding metal layer of the cap are bonded with the third bond made of AuSn.

A chip substrate includes at least one insulation portion interposed between conductive portions. A cavity formed in a recessed shape from a region of an upper surface of the chip substrate exposes a top surface of a part of the at least one insulation portion. An insulation layer is coated on the upper surface of the chip substrate excluding the region of the cavity. A bump may be formed at a predetermined height within the cavity.

Solid-state transducers (SSTs) and vertical high voltage SSTs having buried contacts are disclosed herein. An SST die in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the transducer structure, and a second semiconductor material at a second side of the transducer structure. The SST can further include a plurality of first contacts at the first side and electrically coupled to the first semiconductor material, and a plurality of second contacts extending from the first side to the second semiconductor material and electrically coupled to the second semiconductor material. An interconnect can be formed between at least one first contact and one second contact. The interconnects can be covered with a plurality of package materials.