An electronic component mounting substrate includes: a metal substrate including a first surface, an insulation substrate including a second surface on which a first metal layer having a frame shape is provided, and a bonding material that bonds the first surface and the first metal layer. The bonding material is located in a region that includes the first metal layer and that is surrounded by the first metal layer in a plane perspective.

An electronic component mounting substrate includes: a metal substrate including a first surface, an insulation substrate including a second surface on which a first metal layer having a frame shape is provided, and a bonding material that bonds the first surface and the first metal layer. The bonding material is located in a region that includes the first metal layer and that is surrounded by the first metal layer in a plane perspective.

Systems are described. A system includes a silicon backplane having a top surface, a bottom surface, and side surfaces and a substrate surrounding the side surfaces of the silicon backplane. The substrate has a top surface, a bottom surface and side surfaces. At least one bond pad is provided on the bottom surface of the substrate. A metal layer is provided on the bottom surface of the substrate and the bottom surface of the silicon backplane and has a first portion electrically and thermally coupled to the bottom surface of the silicon backplane in a central region and second portions that extend between a perimeter region of the silicon backplane and the at least one bond pad. An array of metal connectors is provided on the top surface of the silicon backplane.

Light emitter packages having multiple light emitter chips, such as light emitting diode (LED) chips, and related methods are provided. In one aspect, a light emitter package can include a submount, an array of light emitter chips disposed on a portion of the submount, and a lens provided over the submount and covering at least portions of the array. In some aspects, at least some of the light emitter chips can be adapted to emit light of a first dominant wavelength. In further aspects, at least some other light emitter chips are adapted to emit light of a second dominant wavelength that is different than the first dominant wavelength. In some aspects, the lens can be asymmetric. In some aspects, a collective center of the chips, or a center of an array of chips can be offset from a center of the asymmetric lens.

An LED wafer includes LED dies on an LED substrate. The LED wafer and a carrier wafer are joined. The LED wafer that is joined to the carrier wafer is shaped. Wavelength conversion material is applied to the LED wafer that is shaped. Singulation is performed to provide multiple LED dies that are joined to a single carrier die. The multiple LED dies on the single carrier die are connected in series and/or in parallel by interconnection in the LED dies and/or in the single carrier die. The singulated devices may be mounted in an LED fixture to provide high light output per unit area. Related devices and fabrication methods are described.

The invention relates to a light-emitting diode arrangement having the following: a preferably heat-conductive substrate (2); a printed circuit board (5) which is arranged on the substrate (2), a recess (9) being provided in the printed circuit board (5); and at least one light-emitting diode chip (3) which is arranged on the substrate (2) and in the recess (9), said recess (9) being at least partly filled with at least one matrix material which preferably has a color-converting material (8).

In at least one embodiment, the semiconductor component includes at least one optoelectronic semiconductor chip having a radiation exit side. The surface-mountable semiconductor component comprises a shaped body that covers side surfaces of the semiconductor chip directly and in a positively locking manner. The shaped body and the semiconductor chip do not overlap, as seen in a plan view of the radiation exit side.

A package for multiple LED's and for attachment to a substrate includes a body, which includes a top body layer, a cavity disposed through the top body layer and having a floor for bonding to the multiple LED's, and a thermal conduction layer bonded to the top body layer and having a top surface forming the floor of the cavity and a bottom surface. The thermal conduction layer includes a thermally conducting ceramic material disposed between the floor and the bottom surface. The package also includes a plurality of LED bonding pads in direct contact with the floor and configured to bond to the multiple LED's and a plurality of electrical bonding pads in direct contact with the floor, proximate to the LED bonding pads, and in electrical communication with a plurality of electrical contacts disposed on a surface of the body.

Standardized photon building blocks are packaged in molded interconnect structures to form a variety of LED array products. No electrical conductors pass between the top and bottom surfaces of the substrate upon which LED dies are mounted. Microdots of highly reflective material are jetted onto the top surface. Landing pads on the top surface of the substrate are attached to contact pads disposed on the underside of a lip of the interconnect structure. In a solder reflow process, the photon building blocks self-align within the interconnect structure. Conductors in the interconnect structure are electrically coupled to the LED dies in the photon building blocks through the contact pads and landing pads. Compression molding is used to form lenses over the LED dies and leaves a flash layer of silicone covering the landing pads. The flash layer laterally above the landing pads is removed by blasting particles at the flash layer.

The present disclosure is to provide an optoelectronic device. The optoelectronic device comprises a heat dispersion substrate; an insulative protection layer on the heat dispersion substrate, wherein the insulative protection layer comprises AlInGaN series material; and an optoelectronic unit comprising an epitaxial structure comprising multiple layers on the insulative protection layer, wherein at least one layer of the epitaxial structure comprises III-V group material devoid of nitride.