Organic polymer semiconductor-based polymer solar cells (PSCs) have attracted considerable research interest due to having excellent electrical, structural, optical, mechanical, and chemical properties. In the past 20 years, considerable efforts have been made to develop PSCs. Generally, poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS) is used as a hole transport layer (HTL) of the PSC to enhance hole extraction efficiency, but highly acidic PEDOT:PSS destroys an indium tin oxide (ITO) electrode and an active layer and thus reduces the lifetime of the device. To avoid this problem, some attempts have been made to develop inverted PSCs having different electron transport layers (ETLs). However, such a device has limited power conversion efficiency (PCE) due to low electron mobility of the ETL. Therefore, attempts have been made to enhance the PCE of inverted PSCs using indium gallium zinc oxide (IGZO) having optimized indium (In), gallium (Ga), and zinc (Zn) contents. Accordingly, inverted PSCs that have ZnO or IGZO (having varying In:Ga:Zn molar ratios) as an ETL and have an ITO/ETL/PTB7:PC.sub.71BM/MoO.sub.3/Al structure have been constructed. The PCE of the inverted PSC can be increased from 6.22% to 8.72% using IGZO having an optimized weight ratio of In, Ga, and Zn.

Disclosed herein are charge or electricity generating devices and methods of making and use thereof.

A solar cell includes a first layer including a silica material, a second layer including an indium tin oxide material, and a third layer including a chlorophyll-doped poly(3,4-ethylenedioxythiophene):polystyrene sulfonate (PEDOT:PSS@Chl) material. The solar cell further includes a fourth layer including a silver material, and a fifth layer including a silica material. The PEDOT:PSS@Chl material includes chlorophyll in an amount of 4 to 12 percent by weight (wt. %) based on a total weight of the PEDOT:PSS@Chl material. The PEDOT:PSS@Chl material has a surface area of 500 to 550 meter square per gram (m.sup.2/g). The third layer has a thickness of 30 to 70 nanometer (nm).

A display panel includes a substrate and an encapsulation cover plate which are arranged opposite to each other, a driving circuit layer and a light emitting device layer which are sequentially arranged on one side of the substrate close to the encapsulation cover plate, and a dam interposed between the substrate and the encapsulation cover plate. The display panel has a display area and a non-display area arranged around the display area. The light emitting device layer is located in the display area, the driving circuit layer is located in the display area and the non-display area, and the dam is located in the non-display area and arranged around the display area. The dam partially overlaps with the driving circuit layer located in the non-display area. A manufacturing method of the display panel is also provided.

A light-emitting display device is provided. In the light-emitting display device, an insulation stack is patterned to form an opening area in the insulation stack, and an overhang structure in the opening area. An auxiliary electrode is connected to a common electrode around the overhang structure, such that a voltage of the common electrode may be uniformed for each region, and a voltage drop may be prevented. And, an exposed sidewall of the insulation stack surrounding the opening area is covered with the protective electrode, such that exposure of the insulation stack may be prevented at the inside and the sidewall of the opening area and residue of the pixel electrode material may be prevented. In addition, an exposure of a non-uniform interface of the insulating stack is prevented during a process of forming the organic functional layer and the common electrode, so that the organic functional layer and the common electrode may be stably deposited and the coverage characteristics of the encapsulation layer after forming the light-emitting device may be improved.