A LED device comprising: a substrate and an epitaxial layer grown on the substrate and comprising a semiconductor material, wherein at least a portion of the substrate and the epitaxial layer define a mesa; an active layer within the mesa and configured, on application of an electrical current, to generate light for emission through a light emitting surface of the substrate opposite the mesa, wherein the crystal lattice structure of the substrate and the epitaxial layer is arranged such that a c-plane of the crystal lattice structure is misaligned with respect to the light emitting surface.

There is provided a nitride semiconductor ultraviolet light-emitting element capable of efficiently releasing a waste heat generated in an ultraviolet light emitting operation. The nitride semiconductor ultraviolet light-emitting element includes a semiconductor laminated portion 11 having an n-type AlGaN layer 6, an active layer 7 of an AlGaN layer, and p-type AlGaN layers 9 and 10; an n electrode 13; a p electrode 12; a protective insulating film 14, and a first plated electrode 15 formed by a wet plating method and composed of copper or alloy containing copper as a main component. The semiconductor laminated portion 11 is formed in a first region R1, and the p electrode is formed on the portion 11. An upper surface of the n-type AlGaN-based semiconductor layer 6 is exposed in a second region, and the n electrode 13 is formed on the upper surface. The protective insulating film 14 has openings for exposing at least one part of the n electrode 13 and at least one part of the p electrode 12. The first plated electrode 15 is spaced apart from the exposed surface of the n electrode 13 and covers a whole upper surface and a whole outer side surface of the first region R1, and a part of the second region R2 which is in contact with the first region R1.

Aspects include Light Emitting Diodes that have a GaN-based light emitting region and a metallic electrode. The metallic electrode can be physically separated from the GaN-based light emitted region by a layer of porous dielectric, which provides a reflecting region between at least a portion of the metallic electrode and the GaN-based light emitting region.

Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.

The present disclosure provides a light-emitting device, comprising: a light-emitting stack; a first semiconductor layer on the light-emitting stack; a first electrode formed on the first semiconductor layer and comprising an inner segment, an outer segment, and a plurality of extending segments electrically connecting the inner segment with the outer segment.

A device having a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions.

A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.

A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.

A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.

A device includes a support including at least a first area and a second area, and a plurality of first light emitting devices located over the first area of the support, each first light emitting device containing a first growth template including a first nanostructure, and each first light emitting device has a first peak emission wavelength. The device also includes a plurality of second light emitting devices located over the second area of the support, each second light emitting device containing a second growth template including a second nanostructure, and each second light emitting device has a second peak emission wavelength different from the first peak emission wavelength. Each first growth template differs from each second growth template.