A semiconductor nanoparticle, a method of preparing the semiconductor nanoparticle, and an electroluminescent device including the semiconductor nanoparticle. The method of preparing the semiconductor nanoparticle includes contacting a zinc precursor and a sulfur precursor in the presence of a first particle at a predetermined temperature to form a semiconductor nanocrystal layer containing zinc sulfide on the first particle, wherein the first particle includes a Group II-VI compound including zinc, selenium, and, optionally, tellurium, or the first particle includes a Group III-V compound including indium and phosphorus. The predetermined temperature includes (e.g., is) a temperature (e.g., a reaction temperature) of greater than 300 C. and less than or equal to about 380 C., and the sulfur precursor includes a thiol compound of C3 (e.g. C9) to C50 or a combination thereof.

Direct-bonded LED arrays and applications are provided. An example process fabricates a LED structure that includes coplanar electrical contacts for p-type and n-type semiconductors of the LED structure on a flat bonding interface surface of the LED structure. The coplanar electrical contacts of the flat bonding interface surface are direct-bonded to electrical contacts of a driver circuit for the LED structure. In a wafer-level process, micro-LED structures are fabricated on a first wafer, including coplanar electrical contacts for p-type and n-type semiconductors of the LED structures on the flat bonding interface surfaces of the wafer. At least the coplanar electrical contacts of the flat bonding interface are direct-bonded to electrical contacts of CMOS driver circuits on a second wafer. The process provides a transparent and flexible micro-LED array display, with each micro-LED structure having an illumination area approximately the size of a pixel or a smallest controllable element of an image represented on a high-resolution video display.

A light emitting device, includes: a substrate; a light emitting element on the substrate, the light emitting element having a first end portion and a second end portion arranged in a longitudinal direction; one or more partition walls disposed on the substrate, the one or more partition walls being spaced apart from the light emitting element; a first reflection electrode adjacent the first end portion of the light emitting element; a second reflection electrode adjacent the second end portion of the light emitting element; a first contact electrode connected to the first reflection electrode and the first end portion of the light emitting element; an insulating layer on the first contact electrode, the insulating layer having an opening exposing the second end portion of the light emitting element and the second reflection electrode to the outside; and a second contact electrode on the insulating layer.

Provided are an ultraviolet light-emitting element that enables high light emission output and a method of producing the same. The light-emitting element (100) includes, in stated order: an n-type semiconductor layer (3) formed of Al.sub.xGa.sub.1-xN having an Al composition ratio x; a quantum well-type light-emitting layer (4); a p-type electron blocking layer (6) formed of Al.sub.yGa.sub.1-yN having an Al composition ratio y; a p-type cladding layer (7) formed of Al.sub.zGa.sub.1-zN having an Al composition ratio z; and a p-type GaN contact layer (8). The p-type electron blocking layer (6) has an Al composition ratio y of 0.35 to 0.45 and a thickness of 11 nm to 70 nm. The total thickness of the p-type electron blocking layer (6) and p-type cladding layer (7) is 73 nm to 100 nm. The thickness of the p-type GaN contact layer (8) is 5 nm to 15 nm.

Provided are optical transformer devices having a high power efficiency. The device architecture provides uniform current spreading to minimize efficiency droop. The quantum well designs are optimized for both light-emitting diode (LED) and photo diode (PD) operation. A low-loss optical cavity allows efficient transfer of light from the LED junction to the PD junction. The architecture provides a low-loss voltage up- and down-conversion and provides compatibility with production-grade epitaxial growth and wafer fabrication processes.

In an embodiment an optoelectronic component with an epitaxial layer sequence comprises a functional inner region having a first electrical contact and a second electrical contact opposite the first electrical contact, as well as semiconductor layers arranged between the first electrical contact and the second electrical contact configured to generate light. The semiconductor layers comprise a base area that increases towards the second electrical contact. A dielectric passivation layer is arranged on the side walls of the semiconductor layers. A mirror layer surrounds the passivation layer at a distance thereby forming a gap. The second electrical contact and a plane of the gap surrounding the second electrical contact form a common light-emitting surface.

This invention is related to LED Light Extraction for optoelectronic applications. More particularly the invention relates to (Al, Ga, In)N combined with optimized optics and phosphor layer for highly efficient (Al, Ga, In)N based light emitting diodes applications, and its fabrication method. A further extension is the general combination of a shaped high refractive index light extraction material combined with a shaped optical element.

A light emitting diode (LED) includes a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on a portion of the first semiconductor layer, a second semiconductor layer disposed on the active layer, a first conductive layer disposed on a portion of the first semiconductor layer, a second conductive layer disposed on the second semiconductor layer, and an insulating layer overlapping the first semiconductor layer, the second semiconductor layer, and the reflection pattern, in which the insulating layer has a first region having different thicknesses and a second region having a substantially constant thickness.

A semiconductor structure includes a silicon substrate, an aluminum nitride layer and a plurality of grading stress buffer layers. The aluminum nitride layer is disposed on the silicon substrate. The grading stress buffer layers are disposed on the aluminum nitride layer. Each grading stress buffer layer includes a grading layer and a transition layer stacked up sequentially. A chemical formula of the grading layer is Al.sub.1-xGa.sub.xN, wherein the x value is increased from one side near the silicon substrate to a side away from the silicon substrate, and 0x1. A chemical formula of the transition layer is the same as the chemical formula of a side surface of the grading layer away from the silicon substrate. The chemical formula of the transition layer of the grading stress buffer layer furthest from the silicon substrate is GaN.

The present disclosure provides a light-emitting device. The light-emitting device comprises a substrate; a light-emitting stack which emits infrared (IR) light on the substrate; and a semiconductor window layer comprising AlGaInP series material disposed between the substrate and the light-emitting stack.