Patent classifications
H10H20/0137
Method for manufacturing light emitting element and light emitting element
A light emitting element manufacturing method of allowing a semiconductor laminated part which includes a light emitting layer and includes a group-III nitride semiconductor to grow on a substrate surface in which protrusions are formed in a period which is larger than an optical wavelength of light emitted from the light emitting layer and is smaller than a coherent length of the light, includes: forming a buffer layer along the substrate surface having the protrusions; allowing crystal nuclei which have facet surfaces and are separated from each other to grow on the buffer layer such that the crystal nuclei include at least one protrusion; and allowing a planarization layer to grow on the buffer layer in which the crystal nuclei are formed.
DIODE HAVING VERTICAL STRUCTURE
A light emitting device can include a GaN layer having a multilayer structure that can include an n-type layer, an active layer, and a p-type layer, the GaN layer having a first surface and a second surface; a conductive structure on the first surface of the GaN layer, the conductive structure includes a first electrode in contact with the first surface of the GaN layer, the first electrode is configured to reflect light from the active layer back through the second surface of the GaN layer; and a metal layer including Au, in which the metal layer serves as a first pad; a second electrode on the second surface of the GaN layer; and a second pad on the second electrode, in which a thickness of the second pad is about 0.5 m or higher.
LIGHT EMITTING DIODE CHIP
A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, such that A1 and A2 satisfy the relation of 0.1A2/(A1+A2)0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
PREPARATION METHOD FOR HIGH-VOLTAGE LED DEVICE INTEGRATED WITH PATTERN ARRAY
The invention disclosed a preparation method for a high-voltage LED device integrated with a pattern array, comprising the following process steps: providing a substrate, and forming a N-type GaN limiting layer, an epitaxial light-emitting layer and a P-type GaN limiting layer on the substrate in sequence; isolating the N-GaN limiting layer, the epitaxial light-emitting layer and the P-GaN limiting layer on the substrate into at least two or more independent pattern units by means of photo lithography and etching process, wherein each of the pattern unit is in a triangular shape, and very two adjacent pattern units are arranged in an opposing and crossed manner to form a quadrangle, and the quadrangles formed by a plurality of adjacent pattern units are distributed in array; and connecting each pattern unit with metal wires to form a series connection and/or a parallel connection, thereby forming a plurality of interconnected LED chips. For the purpose of improving the current distribution so as to increase the luminescent efficiency of the device, a current blocking layer is also arranged beneath the P-type metal contact of each unit in addition, an insulation material is also arranged to cover the surface of the chip so as to achieve the purposes of protecting the chip and increasing the light extraction efficiency of the chip.
Non-Uniform Multiple Quantum Well Structure
A light emitting heterostructure including one or more fine structure regions is provided. The light emitting heterostructure can include a plurality of barriers alternating with a plurality of quantum wells. One or more of the barriers and/or quantum wells includes a fine structure region. The fine structure region includes a plurality of subscale features arranged in at least one of: a growth or a lateral direction.
III-NITRIDE NANOWIRE LED WITH STRAIN MODIFIED SURFACE ACTIVE REGION AND METHOD OF MAKING THEREOF
A light emitting diode (LED) device includes a semiconductor nanowire core, and an In(Al)GaN active region quantum well shell located radially around the semiconductor nanowire core. The active quantum well shell contains indium rich regions having at least 5 atomic percent higher indium content than indium poor regions in the same shell. The active region quantum well shell has a non-uniform surface profile having at least 3 peaks. Each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley, and each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.
Surface morphology of non-polar gallium nitride containing substrates
Optical devices such as LEDs and lasers are discloses. The devices include a non-polar gallium nitride substrate member having an off-axis non-polar oriented crystalline surface plane. The off-axis non-polar oriented crystalline surface plane can be up to about 0.6 degrees in a c-plane direction and up to about 20 degrees in a c-plane direction in certain embodiments. In certain embodiments, a gallium nitride containing epitaxial layer is formed overlying the off-axis non-polar oriented crystalline surface plane. In certain embodiments, devices include a surface region overlying the gallium nitride epitaxial layer that is substantially free of hillocks.
Method of processing a substrate
The invention relates to a method of processing a substrate, having a first surface with at least one division line formed thereon and a second surface opposite the first surface. The method comprises applying a pulsed laser beam to the substrate from the side of the first surface, at least in a plurality of positions along the at least one division line, so as to form a plurality of hole regions in the substrate, each hole region extending from the first surface towards the second surface. Each hole region is composed of a modified region and a space in the modified region open to the first surface. The method further comprises removing substrate material along the at least one division line where the plurality of hole regions has been formed.
SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHODS THEREOF
A method of manufacturing a semiconductor substrate including forming a first layer on a substrate, patterning the first layer to form a plurality of patterns spaced apart from one another, forming a second layer on the patterns to cover each of the patterns, heat-treating the second layer to form cavities in the patterns between the second layer and the substrate, and growing the second layer covering the cavities.
LIGHT-EMITTING DIODE AND A METHOD FOR MANUFACTURING THE SAME
A method for manufacturing a light-emitting diode (LED) is provided. The method includes following steps. A LED wafer including a substrate and a plurality of light-emitting units formed thereon is provided. At least a portion of the substrate is removed. The LED wafer is fixed on an extensible membrane, wherein the light-emitting unit faces the extensible membrane. The LED wafer is broken to form a plurality of LED dices separated from each other, wherein each LED dice includes at least one light-emitting unit. The extensible membrane is expanded to make a distance between any two of the LED dices become larger.