The present invention provides materials, structures, and methods for III-nitride-based devices, including epitaxial and non-epitaxial structures useful for III-nitride devices including light emitting devices, laser diodes, transistors, detectors, sensors, and the like. In some embodiments, the present invention provides metallo-semiconductor and/or metallo-dielectric devices, structures, materials and methods of forming metallo-semiconductor and/or metallo-dielectric material structures for use in semiconductor devices, and more particularly for use in III-nitride based semiconductor devices. In some embodiments, the present invention includes materials, structures, and methods for improving the crystal quality of epitaxial materials grown on non-native substrates. In some embodiments, the present invention provides materials, structures, devices, and methods for acoustic wave devices and technology, including epitaxial and non-epitaxial piezoelectric materials and structures useful for acoustic wave devices. In some embodiments, the present invention provides metal-base transistor devices, structures, materials and methods of forming metal-base transistor material structures for use in semiconductor devices.

A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.

A method of producing a semiconductor layer sequence includes providing a growth substrate having a growth surface on a growth side, growing a first nitride semiconductor layer on the growth side, growing a second nitride semiconductor layer on the first nitride semiconductor layer, wherein the second nitride semiconductor layer includes at least one opening or at least one opening is produced in the second nitride semiconductor layer or at least one opening is created in the second nitride semiconductor layer during the growing process, removing at least one part of the first nitride semiconductor layer through the openings in the second nitride semiconductor layer, and growing a third nitride semiconductor layer on the second nitride semiconductor layer, wherein the third nitride semiconductor layer covers the openings at least in places.

A processing method for optical device wafers includes a shielded tunnel forming step and a dividing step. In the shielded tunnel forming step, a sapphire substrate is irradiated with a pulse laser beam having such a wavelength as to be transmitted through the sapphire substrate along regions corresponding to planned dividing lines. The light focus point of the beam is positioned inside the substrate from the back surface side of the substrate. Fine pores and amorphous regions that shield the fine pores form shielded tunnels along the planned dividing lines. In the dividing step, an external force is applied to the optical device wafer, and the optical device wafer is divided into individual optical device chips along the planned dividing lines. In the shielded tunnel forming step, a spherical aberration is generated by causing the laser beam to be incident on a condensing lens with a divergence angle.

Heterostructures for use in optoelectronic devices are described. One or more parameters of the heterostructure can be configured to improve the reliability of the corresponding optoelectronic device. The materials used to create the active structure of the device can be considered in configuring various parameters the n-type and/or p-type sides of the heterostructure.

The present invention provides a Group III nitride semiconductor light-emitting device exhibiting improved emission efficiency. The Group III nitride semiconductor light-emitting device includes a base layer, an n-type superlattice layer, a light-emitting layer, and a p-type cladding layer, each of the layers being made of Group III nitride semiconductor. An electron injection adjusting layer comprising a single Al.sub.xGa.sub.1-xN (0<x<1) layer and having a thickness of 5 to 30 is formed in the base layer. The n-type superlattice layer is a superlattice layer having a periodic structure of an In.sub.yGa.sub.1-yN (0<y<1) layer, an i-GaN layer, and an n-GaN layer. The electron injection adjusting layer has a thickness of 5 to 30 and an Al composition ratio of 0.15 to 0.5.

Techniques for processing materials for manufacture of gallium-containing nitride substrates are disclosed. More specifically, techniques for fabricating and reusing large area substrates using a combination of processing techniques are disclosed. The methods can be applied to fabricating substrates of GaN, AlN, InN, InGaN, AlGaN, and AlInGaN, and others. Such substrates can be used for a variety of applications including optoelectronic devices, lasers, light emitting diodes, solar cells, photo electrochemical water splitting and hydrogen generation, photo detectors, integrated circuits, transistors, and others.

Embodiments include systems and methods for producing semiconductor wafers having reduced quantities of point defects. These systems and methods include a tunable ultraviolet (UV) light source, which is controlled to produce a raster of a UV light beam across a surface of a semiconductor wafer during epitaxial growth to dissociate point defects in the semiconductor wafer. In various embodiments, the tunable UV light source is configured external to a Metal Organic Chemical Vapor Deposition (MOCVD) chamber and controlled such that the UV light beam is directed though a window defined in a wall of the MOCVD chamber.

A method of making a GaN device includes: forming a GaN substrate; forming a plurality of spaced-apart first metal contacts directly on the GaN substrate; forming a layer of insulating GaN on the exposed portions of the upper surface; forming a stressor layer on the contacts and the layer of insulating GaN; forming a handle substrate on the first surface of the stressor layer; spalling the GaN substrate that is located beneath the stressor layer to separate a layer of GaN and removing the handle substrate; bonding the stressor layer to a thermally conductive substrate; forming a plurality of vertical channels through the GaN to define a plurality of device structures; removing the exposed portions of the layer of insulating GaN to electrically isolate the device structures; forming an ohmic contact layer on the second surface; and forming second metal contacts on the ohmic contact layer.

A nitride semiconductor light emitting element 1 includes a second conductivity type nitride semiconductor layer which is formed above a first conductivity type nitride semiconductor layer, a first electrode 17a which is formed on a first region of the second conductivity type nitride semiconductor layer with a first current non-injection layer 13a in between, a first current diffusing layer 14a which is formed between the first current non-injection layer 13a and the first electrode 17a, a second electrode 17b which is formed on a second region of the second conductivity type nitride semiconductor layer with a second current non-injection layer 13b in between, a second current diffusing layer 14b which is formed on the second region and on the second current non-injection layer 13b, and an extending portion 17c which extends from the first electrode 17a and reaches the exposed first conductivity type nitride semiconductor layer.