The present disclosure relates to an electron-optical stack for manipulating one or more charged particle beams and associated apparatus and methods. In one arrangement, a plurality of electron-optical plates have major surfaces on opposite sides of the plates. The plates define a set of channels configured to be aligned along a beam path of a charged particle beam to allow the charged particle beam to pass through the plates via the channels. Each channel defines apertures in the two major surfaces of the plate that defines the channel. The apertures have different shapes from each other. The plates are oriented such that the apertures comprise one or more matching aperture pairs along the beam path. The or each matching aperture pair consists of apertures having the same shape defined in adjacent major surfaces of adjacent plates.

A radiation powered computation apparatus is disclosed. In one aspect, the apparatus includes a radiation source that is configured to emit radiation. The apparatus further includes a first layer that surrounds the radiation source and that includes a first plurality of transistors that are configured to be powered by the radiation. The apparatus further includes a second layer that surrounds the first layer and that includes a plurality of receptors that are configured to convert the radiation to power and a second plurality of transistors that receives the power and that are configured control the first plurality of transistors.

The invention relates to a DEPFET comprising: a semiconductor substrate (100) of a first conduction type, which has a first main surface (101) and a second main surface (102), which are opposite one another; a source terminal region (1s) of a second conduction type on the first main surface (101); a drain terminal region (1d) of a second conduction type; a channel region (10), which is arranged between the source terminal region (1s) and the drain terminal region (1d); a gate electrode (11), which is separated from the channel region (10) by a gate insulator (6); a rear activation region (104) of a second conduction type, which is formed on the second main surface (102); and a substrate doping increase region (2) of a first conduction type, which is formed at least under the source terminal region (1s) and under the channel region (10), the substrate doping increase region (2) having a signal charge control region (20) of the first conduction type below the gate electrode (11), in which signal charge control region the effective doping dose has a higher value than at other points of the substrate doping increase region (2) below the gate electrode.

The loading effects of boron layers on silicon within a window may be reduced or eliminated by depositing an adhesion layer on a dielectric layer before depositing the boron layer. The adhesion layer may reduce or eliminate lateral diffusion of boron species into the window by being deposited on the adhesion layer. The approach using the adhesion layer may enable forming the boron layer at the nanometer scale within windows which are at the tens of millimeters scale and below. The boron layer and the silicon layer may form a detector which may be used in scanning electron microscopes and the like.

Disclosed are an X-ray detection panel, an X-ray detector including the same, and a unit pixel for the same. The X-ray detection panel includes a plurality of unit pixels each including a photodiode, a first readout thin-film transistor, and a second readout thin-film transistor, wherein the first and second readout thin-film transistors are electrically connected to the photodiode and are connected in series to each other.

Disclosed are an X-ray detection panel, an X-ray detector including the same, and a unit pixel for the same. The X-ray detection panel includes a plurality of unit pixels each including a photodiode, a first readout thin-film transistor, and a second readout thin-film transistor, wherein the first and second readout thin-film transistors are electrically connected to the photodiode and are connected in series to each other.

An semiconductor detector includes an n-type semiconductor substrate, a detection electrode formed on a first surface of the semiconductor substrate, a plurality of drift electrodes formed to surround the detection electrode and applied with a voltage causing a potential gradient in which a potential changes toward the detection electrode, a radiation incidence window provided on a second surface of the semiconductor substrate, a P-type semiconductor region formed by adding boron to a surface side on the second surface of the semiconductor substrate through the radiation incidence window, and a depleting electrode causing a reverse bias between the P-type semiconductor region formed on the second surface and an N-type semiconductor region formed in the semiconductor substrate. F is added to the P-type semiconductor region, and a region with the highest concentration of F is located deeper than a region with the highest concentration of B.

Provided are a silicon carbide detector and a fabrication method thereof. The silicon carbide detector includes: a silicon carbide substrate layer; and a silicon carbide base layer located on a side of the silicon carbide substrate layer, where the silicon carbide base layer includes a first silicon carbide layer, a second silicon carbide layer and a third silicon carbide layer that are stacked; the third silicon carbide layer serves as an anode layer and is located in a first region of the second silicon carbide layer, and a second region of the second silicon carbide layer is exposed; N drift rings are provided in the second region of the second silicon carbide layer, and among the N drift rings, a 1st drift ring is a closed ring and remaining drift rings are arranged in a spiral pattern around the 1st drift ring.

Thermal neutron detectors and methods of fabricating the same are provided. A thermal neutron detector can use boron in both the neutron conversion layer and as a source for conformal doping in a semiconductor substrate. The neutron detector can be a micro-structured diode with cavities having a depth of 60 microns or less. The boron can be filled in the cavities and diffused into the semiconductor substrate via a diffusion annealing process.

The present disclosure describes a detector used in critical dimension scanning electron microscopes (CD-SEM) and review SEM systems. In one embodiment, the detector includes a semiconductor structure having a p-n junction and a hole through which a scanning beam is passed to a target. The detector also includes a top electrode for the p-n junction (e.g., anode or cathode) that provides an active area for detecting electrons or electromagnetic radiation (e.g., backscattering from the target). The top electrode has a doped layer and can also have a buried portion beneath the doped layer to reduce a series resistance of the top electrode without changing the active area. In another embodiment, an isolation structure can be formed in the semiconductor structure near sidewalls of the hole to electrically isolate the active area from the sidewalls. A method for forming the buried portion of the top electrode is also described.