A light emitting diode (LED) includes a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, a first conductive layer disposed on a portion of the second semiconductor layer, a second conductive layer disposed on the second semiconductor layer, and an insulation layer including a first insulating layer and a second insulating layer disposed on the first insulating layer, and overlapping the first semiconductor layer, the second semiconductor layer, and the second conductive layer, in which the insulation layer has a first region having different thicknesses and a second region having a substantially constant thickness.

A light emitting diode (LED) device includes a semiconductor nanowire core, and an In(Al)GaN active region quantum well shell located radially around the semiconductor nanowire core. The active quantum well shell contains indium rich regions having at least 5 atomic percent higher indium content than indium poor regions in the same shell. The active region quantum well shell has a non-uniform surface profile having at least 3 peaks. Each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley, and each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.

A method of manufacturing a semiconductor light emitting device is provided. The method includes forming a first region of a lower semiconductor layer on a substrate, etching an upper surface of the first region using at least one gas used in forming the first region, in-situ in a chamber in which a process of forming the first region has been performed, forming a second region of the lower semiconductor layer on the first region, forming an active layer on the lower semiconductor layer, and forming an upper semiconductor layer on the active layer.

A method of manufacturing a semiconductor substrate including forming a first layer on a substrate, patterning the first layer to form a plurality of patterns spaced apart from one another, forming a second layer on the patterns to cover each of the patterns, heat-treating the second layer to form cavities in the patterns between the second layer and the substrate, and growing the second layer covering the cavities.

A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.

There is provided a method for manufacturing a nitride semiconductor template, including the steps of: growing and forming a buffer layer in a thickness of not more than a peak width of a projection and in a thickness of not less than 10 nm and not more than 330 nm on a sapphire substrate formed by arranging conical or pyramidal projections on its surface in a lattice pattern; and growing and forming a nitride semiconductor layer on the buffer layer.

A device having a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions.

A semiconductor light emitting device comprising a light emitting layer disposed between an n-type region and a p-type region is combined with a ceramic layer which is disposed in a path of light emitted by the light emitting layer. The ceramic layer is composed of or includes a wavelength converting material such as a phosphor. Luminescent ceramic layers according to embodiments of the invention may be more robust and less sensitive to temperature than prior art phosphor layers. In addition, luminescent ceramics may exhibit less scattering and may therefore increase the conversion efficiency over prior art phosphor layers.

A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.

A light emitting diode includes a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, a second electrode, a static electrode and a carbon nanotube structure. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked on the substrate. The first electrode is located on and electrically connected to the first semiconductor layer. The carbon nanotube structure is located on and electrically connected to the second semiconductor layer. The second electrode is located on and electrically connected to the carbon nanotube structure. The static electrode is located between the second semiconductor layer and the carbon nanotube structure. The carbon nanotube structure includes a first portion in direct contact with the second semiconductor layer and a second portion sandwiched between the static electrode and the second electrode.