Patent classifications
H10H20/815
Method for making a light-emitting device
This disclosure discloses a method for making a light-emitting device, comprising steps of: providing a substrate; forming a light-emitting stack on the substrate; forming a first layer on the light-emitting stack; providing a permanent substrate; forming a second layer on the permanent substrate; bonding the first layer and the second layer to form a bonding layer to connect the substrate and the permanent substrate; wherein a refractive index of the bonding layer decreases from the light-emitting stack toward the permanent substrate.
Optoelectronic device with improved light extraction efficiency
The optoelectronic device (1) comprises a substrate (2), a light-emitting member (3) comprising an elongate element (4) extending in a direction forming an angle with the substrate (2). An intermediate element (5) is interposed between the substrate (2) and a longitudinal end of the elongate element (4) closest to the substrate (2). Furthermore, the substrate (2) is transparent to said light and the intermediate element (5), transparent to said light, comprises at least one nitride of a transition metal, and has a thickness less than or equal to 9 nm.
METHOD OF GROWING A HIGH QUALITY III-V COMPOUND LAYER ON A SILICON SUBSTRATE
The present disclosure involves a method of fabricating a semiconductor device. A surface of a silicon wafer is cleaned. A first buffer layer is then epitaxially grown on the silicon wafer. The first buffer layer contains an aluminum nitride (AlN) material. A second buffer layer is then epitaxially grown on the first buffer layer. The second buffer layer includes a plurality of aluminum gallium nitride (Al.sub.xGa.sub.1xN) sub-layers. Each of the sub-layers has a respective value for x that is between 0 and 1. A value of x for each sub-layer is a function of its position within the second buffer layer. A first gallium nitride (GaN) layer is epitaxially grown over the second buffer layer. A third buffer layer is then epitaxially grown over the first GaN layer. A second GaN layer is then epitaxially grown over the third buffer layer.
LIGHT EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME
A light emitting diode and a method of manufacturing the light emitting diode are provided. The light emitting diode includes an n-type semiconductor layer, an inclined type superlattice thin film layer, an active layer, and a p-type semiconductor layer. The n-type semiconductor layer is disposed on a substrate. The inclined type superlattice thin film layer is disposed on the n-type semiconductor layer and includes a plurality of thin film pairs in which InGaN thin films and GaN thin films are sequentially stacked. The active layer having a quantum well structure is disposed on the inclined type superlattice thin film layer. The p-type semiconductor layer is disposed on the active layer. Composition ratio of Indium (In) included in the InGaN thin film is increased as getting closer to the active layer. Thus, internal residual strain is reduced, and quantum confinement effect is enhanced, and internal quantum efficiency is increased.
SEMICONDUCTOR STRUCTURE
A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure mainly includes a stress control layer disposed between a light emitting layer and a p-type carrier blocking layer. The p-type carrier blocking layer is made from Al.sub.xGa.sub.1-xN (0<x<1) while the stress control layer is made from Al.sub.xIn.sub.yGa.sub.1-x-yN (0<x<1, 0<y<1, 0<x+y<1). The light emitting layer has a multiple quantum well structure formed by a plurality of well layers and barrier layers stacked alternately. There is one well layer disposed between the two barrier layers. Thereby the stress control layer not only improves crystal quality degradation caused by lattice mismatch between the p-type carrier blocking layer and the light emitting layer but also reduces effects of compressive stress on the well layer caused by material differences.
Patterned Layer Design for Group III Nitride Layer Growth
A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-Ill nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. A device including one or more of these features also is provided.
LIGHT-EMITTING DEVICE
A light-emitting device is provided. The light-emitting device comprises: an active structure, the active structure comprising alternate well layers and barrier layers, wherein each of the well layers comprises multiple different elements of group VA; a first semiconductor layer of first conductivity type and a second semiconductor layer of second conductivity type sandwiching the active structure; an intermediate layer interposed between the first semiconductor layer and the active structure; and a first window layer on the first semiconductor layer, wherein the intermediate layer comprises Al.sub.z1Ga.sub.1-z1As, the first window layer comprises Al.sub.z2Ga.sub.1-z2As, and z.sub.1>z.sub.2.
SUBSTRATE STRUCTURE, SEMICONDUCTOR COMPONENT AND METHOD
In an embodiment, a substrate structure includes a support substrate, a buffer structure arranged on the support substrate, the buffer structure including an intentionally doped superlattice laminate, an unintentionally doped first Group III nitride layer arranged on the buffer structure, a second Group III nitride layer arranged on the first Group III nitride layer forming a heterojunction therebetween, and a blocking layer arranged between the heterojunction and the buffer structure. The blocking layer is configured to block charges from entering the buffer structure.
Light emitting diode chip
A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the microstructures is A2, such that A1 and A2 satisfy the relation of 0.1A2/(A1+A2)0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
Electronic Devices Comprising N-Type and P-Type Superlattices
A superlattice and method for forming that superlattice are disclosed. In particular, an engineered layered single crystal structure forming a superlattice is disclosed. The superlattice provides p-type or n-type conductivity, and comprises alternating host layers and impurity layers, wherein: the host layers consist essentially of a semiconductor material; and the impurity layers consist of a donor or acceptor material.