A display device may include: a connection pattern and a dummy pattern disposed to be spaced apart from each other on a substrate; a via layer on the substrate; a pixel electrode on the via layer and electrically connected to the connection pattern; a light emitting layer disposed on the pixel electrode; a control layer disposed on the light emitting layer; and a common electrode disposed on the control layer. The dummy pattern may include a first conductive layer, a second conductive layer, a third conductive layer, a fourth conductive layer, and a fifth conductive layer sequentially disposed. The first conductive layer, the third conductive layer, and the fifth conductive layer may include the same material. The second conductive layer and the fourth conductive layer may include the same material. The first, third, fifth conductive layers and the second and fourth conductive layers may include different materials.

Disclosed is a flexible display substrate and a method for manufacturing the same which can avoid break and peeling of film layers disposed on a flexible base and further reduce degree of a warpage occurred in the flexible base when separating the support substrate from the flexible base located above the support substrate. The flexible display substrate comprises the flexible base, a first buffer layer and a second buffer layer disposed on an upper surface and a lower surface of the flexible base, respectively, a plurality of display modules disposed on the first buffer layer, each display module includes at least one thin film transistor and at least one electrode corresponding to the thin film transistor, and a plurality of auxiliary thin film transistors disposed on one side of the second buffer layer which is away from the flexible base, the auxiliary thin film transistors corresponding to the thin film transistors one by one, respectively.

Disclosed are an LCD device and a method of manufacturing the same, in which a passivation layer and a pixel electrode are simultaneously formed by a single mask process using a half tone mask, and thus, manufacturing efficiency increases, and a defective contact due to loss of the pixel electrode can be prevented in a pad area. The LCD device includes a pad part including a pad area and a contact area. The LCD device includes a pixel pad formed in the pad area, a pixel bar formed in the contact area, and a bridge layer contacting the pixel pad with the pixel bar. The bridge layer is formed as a single layer or multi layers, and formed of one or more of a transparent conductive material and an opaque conductive material.

A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

A method of making a display device includes, providing a substrate having a display area and a pad area in a periphery of the display area, the display area including a plurality of pixel regions; forming a thin film transistor having a channel layer on the substrate; arranging a gate link line and a first common voltage line to cross each other, and having a first insulation film be interposed therebetween; arranging a second common voltage line and a data link line to cross each other, and having second insulation film be interposed therebetween; disposing a first pattern on the first insulation film; and disposing a second pattern on the second insulation film, wherein the channel layer, the first pattern and the second pattern are formed of the same material.

A method of manufacturing an array substrate is discussed. The method includes forming a gate line on a substrate including a pixel region, forming a gate electrode on the substrate and connected to the gate line, and forming a gate insulating layer on the gate line and the gate electrode. The method further includes forming a data line on the gate insulating layer and crossing the gate line to define the pixel region, forming a source electrode and a drain electrode on the gate insulating layer and corresponding to the gate electrode, the source electrode connected to the data line and the drain electrode spaced apart from the source electrode, and forming an oxide semiconductor layer on top of the source and drain electrodes.

The short-circuit protection circuit for a Gate Driver on Array (GOA) liquid crystal panel contains a power module, a first booster module, a feedback module, and a second booster module series-connected in the this order. A control module is electrically connected to the first booster, feedback, and second booster modules. The power module provides a power voltage. The control module provides a pulse width modulation (PWM) signal so as to control the first and second booster modules to transform the power voltage into driving voltage. The feedback module extracts a feedback current from a current flowing from the first to the second booster module and provides a feedback signal to the control module. When the feedback current exceeds a current threshold, the control module cuts off the PWM signal output so as to achieve short-circuit protection. A liquid crystal panel incorporating the above short-circuit protection circuit is also provided.

Disclosed is a display device that includes an array substrate that includes a display region and a first non-display region, and includes a signal line connected to a pixel in the display region; a first signal transfer line that is at the first non-display region and transfers a test signal, and a second signal transfer line that transfers a test enable signal; a connection pattern connected to the first signal transfer line; a test transistor that is connected between the signal line and the connection pattern, and is connected to the second signal transfer line; and an electrostatic induction element that includes a dummy device in the form of either a dummy pattern and/or a dummy test transistor, the dummy pattern including a dummy connection pattern connected to the first signal transfer line, the dummy test transistor connected to the second signal transfer line.

The present invention relates to an array substrate, which comprises: a display region and a drive circuit region; the drive circuit region comprises GOA units, the GOA unit comprising a substrate, a gate electrode layer, an insulation layer, an active layer and a source/drain electrode layer, and the drive circuit region further comprises a gate wire connecting to the gate electrode layer, and a source/drain layer wire at the same layer with the source/drain electrode layer, wherein the area between the portions of the gate wire and the source/drain layer wire which intercross with each other is only formed with the insulation layer. The invention further relates to a manufacturing method of an array substrate and a display apparatus comprising the array substrate.

One embodiment of the present invention provides a highly reliable display device. In particular, a display device to which a signal or a power supply potential can be supplied stably is provided. Further, a bendable display device to which a signal or a power supply potential can be supplied stably is provided. The display device includes, over a flexible substrate, a display portion, a plurality of connection terminals to which a signal from an outside can be input, and a plurality of wirings. One of the plurality of wirings electrically connects one of the plurality of connection terminals to the display portion. The one of the plurality of wirings includes a first portion including a plurality of separate lines and a second portion in which the plurality of lines converge.