A semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.

An electronic circuit device that includes a plurality of electrical circuits disposed on a support substrate, such as an electronic display device, includes one or more primary electrodes that extend along a trace on the support substrate, wherein the primary electrodes form one or more primary electrical pathways of or to one or more of the electrical circuits. One or more secondary electrodes are disposed along and in electrical contact with the primary electrodes. The secondary electrodes extend along the trace substantially parallel with the primary electrodes and form secondary electrical pathways adjacent the primary electrical pathways. The secondary electrodes are formed of a secondary conductor that is electrically conductive and has a higher strain limit than the primary electrodes. The secondary electrodes are able to handle a higher amount of strain than the primary electrode without breaking the secondary electrical pathway and thereby are arranged to complete the electrical circuits when a gap in a primary electrode interrupts the electrical circuit through the primary electrode.

A display device made of a TFT substrate and a driver IC is configured to eliminate bad connection between them. On the driver IC connected to the TFT substrate, a first principal surface has first bumps formed along a first side having a first edge and second bumps formed along a second side opposite to the first side and having a second edge. The TFT substrate has first terminals and second terminals connected to the first and the second bumps, respectively. On a cross section taken perpendicularly to the first and the second sides, the first principal surface has a first area between the first and the second bumps and a second area between the second bumps and the second edge. The first and the second areas are bent toward the TFT substrate.

The present application discloses a display panel, a display panel manufacturing method, and a display device. The display panel includes a source region and a drain region. A dielectric layer covering the source region and the drain region is provided with a first via hole and a second via hole separately. The first via hole is connected to the source region or the drain region, the second via hole is located on the top of the first via hole and is in communication with the first via hole, and an aperture of the second via hole is larger than an aperture of the first via hole.

An array substrate includes a display area, and the array substrate includes an anti-cracking dam, a metal lead and a first data line, wherein the anti-cracking dam is arranged on a side of the array substrate and located in the display area, and the anti-cracking dam is arranged to surround a through-hole extending through the array substrate; the metal lead is arranged to at least partially surround the anti-cracking dam; the first data line includes a first section and a second section separated from each other by the through-hole; the first section of the first data line is connected to the first end of the metal lead, and the second section of the first data line is connected to the another end of the metal lead.

A display panel and a display apparatus. The display panel includes: an array substrate, including: scanning lines, data lines and sub-pixels, where at least two sub-pixels adjacent in a first direction and a second direction constitute a pixel island; an opposing substrate; a liquid crystal layer; and supporting parts, including a plurality of first supporting parts and a plurality of second supporting parts. Each supporting part includes: a first sub-supporting part and a second sub-supporting part; orthographic projections of the first sub-supporting parts divide orthographic projections of the second sub-supporting parts into first parts and second parts; and in each supporting part, a length of the first part is not equal to a length of the second part.

An array substrate includes: a first substrate; a plurality of gate lines and a plurality of data lines; a plurality of thin film transistors; and a plurality of reflective electrodes. The plurality of gate lines and the plurality of data lines define a plurality of sub-pixel regions. A thin film transistor is located in a sub-pixel region. A reflective electrode is located in the sub-pixel region and electrically connected to the thin film transistor in the same sub-pixel region. Each reflective electrode has a border including a plurality of first sub-borders extending in a first direction, a plurality of second sub-borders extending in a second direction, and a plurality of chamfer borders each connecting a first sub-border and a second sub-border that are adjacent; and an intersection of extension lines of the first sub-border and the second sub-border is located outside the border of the reflective electrode.

There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display.

A display substrate, a method for fabricating the same, and a display device are disclosed. The display substrate comprises a plurality of pixels; and a plurality of slit patterns, which are arranged between at least two of the plurality of pixels, and comprise a plurality of slits arranged in a rubbing direction. Slit patterns are provided, and each of slit patterns comprises slits in the rubbing direction. Thus, during a rubbing alignment process, the slit patterns can guide a rubbing cloth to move in the rubbing direction. Accordingly, the alignment of the rubbing cloth is prevented from changing in the rubbing process, a good alignment layer is formed, rubbing Mura is avoided, and the lifetime of the rubbing cloth is extended.

The present disclosure provides a method for fabricating an array substrate. The method includes providing a substrate; forming a first pattern on the substrate including a plurality of signal lines and a plurality of electrostatic discharge (ESD) lines, wherein an ESD line is configured to connect two signal lines; and removing a portion of each ESD line during a process for forming a second pattern over the first pattern to disconnect the two signal lines.