A display device is disclosed. In one aspect, the display device includes a flexible substrate capable of being bent in a first direction and an insulating layer including a first opening pattern positioned on the flexible substrate and extending in a second direction crossing the first direction.

Provided is an active matrix display device using an organic EL panel including: a plurality of pixel circuits each including an organic light emitting diode arranged in a pixel region of the organic EL panel and a plurality of transistors configured to drive the organic light emitting diode; a plurality of scanning lines arranged along a first direction in the organic EL panel; and a plurality of data lines arranged along a second direction that is orthogonal to the first direction. In at least one set of pixel circuits that are adjacent in the first direction, gate electrodes and impurity diffusion regions of the plurality of transistors have an axisymmetric layout. Gate electrodes of at least one set of transistors that are symmetrically arranged in the at least one set of pixel circuits are integrated.

The present invention provides a display substrate and a manufacturing method thereof. The display substrate of the present invention comprises a first structure and a second structure; wherein, the second structure is provided with a lap portion disposed on the first structure and a main body portion connected with the lap portion and outside the first structure; the first structure has a thinned region connected to an edge thereof, and a thickness of the first structure in the thinned region is smaller than that outside the thinned region; and at least part of the lap portion is located on the thinned region, and at least part of the main body portion outside the thinned region is in direct connection with the part of the lap portion on the thinned region.

An embodiment of the present disclosure relates to the field of display technology, especially to a peripheral wiring structure of a display substrate, and a display substrate. In each two adjacent wirings on a display substrate, a first peripheral wiring structure has a first bent part which includes a first inclined surface, a first top surface, a second inclined surface; and a second peripheral wiring structure has a second bent part which includes a third inclined surface, a second top surface, a fourth inclined surface; a centerline of the second bent part is located between two adjacent first bent parts, and the third inclined surface of the second bent part is opposite to and parallel to the second inclined surface of one first bent part, and the distance between the third and second inclined surfaces is larger than that between the second and first top surfaces; the fourth inclined surface is opposite to and parallel to the first inclined surface of another first bent part, and the distance between the fourth and first inclined surfaces is larger than that between the second and first top surfaces. The distance between the adjacent peripheral wirings in the above-described display substrate may be smaller than the minimal distance of the Array process, which contributes to achieve a narrow border design of a display device.

A display panel is provided. The display panel has an active area and a border area out of the active area. The display panel includes a plurality of pixels, a first gate driver portion, a plurality of scan lines and a multiplexer portion. The pixels are located in the active area. The first gate driver portion is located in the border area. The scan lines are located in the active area, and connected to the first gate driver portion. The multiplexer portion is located in the border area. The multiplexer portion and the first gate driver portion at least partially overlap along a direction parallel to one of the plurality of scan lines.

A display device is disclosed. In one aspect, the display device includes a substrate, a first signal line formed over the substrate and a first insulating layer formed over the substrate and the first signal line. The display device also includes a second signal line formed over the first insulating layer and including an overlapping area that overlaps the first signal line, a second insulating layer formed over the second signal line and having a via hole that exposes at least a part of the overlapping area. The display device further includes an auxiliary wiring layer covering the via hole and connected to the overlapping area through the via hole.

In an active matrix substrate, each of at least two auxiliary capacitance electrodes contains a first electrode section and a second electrode section, at least a portion of the first electrode sections and at least a portion of a plurality of source bus lines overlap each other, the second electrode section has two linear sections that branch from the first electrode section and that extend in a second direction, a portion of the region between the two linear sections and at least a portion of the plurality of source bus lines overlap each other, and the first and second electrode sections, which are adjacent and arranged in a first direction, are disposed symmetrically to each other about a reference point that is on a straight line passing through a substantially central portion of respective pixels arranged in the first direction.

In a static electricity protection circuit according to the invention, a first wiring is electrically connected to a drain of a first p-type transistor and a gate and a source of a first n-type transistor; a second wiring is electrically connected to a gate and a source of the first p-type transistor, a drain of the first n-type transistor, a drain of a second p-type transistor and a gate and a source of a second n-type transistor; and a third wiring is electrically connected to a gate and a source of the second p-type transistor and a drain of the second n-type transistor.

Disclosed is a display device that includes an array substrate that includes a display region and a first non-display region, and includes a signal line connected to a pixel in the display region; a first signal transfer line that is at the first non-display region and transfers a test signal, and a second signal transfer line that transfers a test enable signal; a connection pattern connected to the first signal transfer line; a test transistor that is connected between the signal line and the connection pattern, and is connected to the second signal transfer line; and an electrostatic induction element that includes a dummy device in the form of either a dummy pattern and/or a dummy test transistor, the dummy pattern including a dummy connection pattern connected to the first signal transfer line, the dummy test transistor connected to the second signal transfer line.

A liquid crystal display device includes a TFT substrate and a counter substrate with liquid crystal sandwiched therebetween. The TFT substrate has scanning lines 10 extending in a first direction and arrayed in a second direction and video signal lines 20 extending in the second direction and arrayed in the first direction. The TFT substrate has a display area 500 in which TFT pixels are arrayed in a matrix pattern, and a frame area 600 surrounding the display area. In the frame area 600, common bus wires 521 are formed in the same layer and with the same material as the video signal lines 20 and are impressed with a common voltage. Dummy TFTs are formed in a layer under the common bus wires 521. The scanning lines 10, extending over the frame area 600, are divided outside the display area and are interconnected by bridging wires 170.