An electronic device includes a substrate and a wiring structure disposed on the substrate. The substrate includes a first surface, a second surface, a first side surface, and a second side surface. The wiring structure includes a first wiring, a second wiring, a third wiring, a first pad, and a second pad, the first pad is electrically connected to the first wiring through the second wiring, and the second pad is electrically connected to the first wiring through the third wiring. The second wiring includes a first line segment disposed on the first surface, a second line segment disposed on the first side surface, and a third line segment disposed on the second surface. The third wiring includes a fourth line segment disposed on the first surface, a fifth line segment disposed on the second side surface, and a sixth line segment disposed on the second surface.

A display device includes: a substrate; a semiconductor layer; a gate electrode overlapping the semiconductor layer; a common voltage line disposed on a same layer as the gate electrode; a common voltage line anti-oxidation layer disposed on the common voltage line; an interlayer insulating layer; source and drain electrodes disposed on the interlayer insulating layer; and a common voltage applying electrode disposed on a same layer as the source electrode and the drain electrode. The common voltage applying electrode is connected to the common voltage line through a first contact hole formed in the interlayer insulating layer, the common voltage line anti-oxidation layer includes an opening overlapping the common voltage line, the interlayer insulating layer is disposed in the opening, a width of the opening is smaller than a width of the common voltage line, and the first contact hole is disposed in the opening in a plan view.

An array substrate includes an opening area and a non-opening area, and further includes a first substrate, a gate insulating layer, a first interlayer insulating layer, and a second interlayer insulating layer. The gate insulating layer is disposed on the first substrate and located in the opening area and the non-opening area. The first interlayer insulating layer is disposed on a side of the gate insulating layer away from the first substrate and located in the non-opening area. The second interlayer insulating layer is disposed on a side of the first interlayer insulating layer away from the first substrate and located in the opening area and the non-opening area. A projection of the first interlayer insulating layer on the first substrate is tangent to or separated from a projection of the opening area on the first substrate. A display panel includes the array substrate.

A display substrate, a method for manufacturing a display substrate and a display device are provided. The display substrate has a display area and a bonding area. The display substrate includes a base, a first conductive layer, a light shielding layer, and bonding pads. The first conductive layer is on the base and in the display area, and the first conductive layer includes gate lines; the light shielding layer is on a side of the first conductive layer proximal to the base, and an orthographic projection of the light shielding layer on the base at least covers orthographic projections of the gate lines on the base; the bonding pads are on the base at intervals and in the bonding area, orthographic projections of at least a portion of the bonding pads on the base are not overlapped with the orthographic projection of the light shielding layer on the base.

The present invention discloses an array substrate and a manufacturing method thereof, and a display device, and relates to the field of display technology, in order to reduce the leakage current of the TFT, improve the stability of the TFT, and enhance the display effect of the display device. The array substrate comprises: a transparent substrate, a TFT on the transparent substrate, a first passivation layer covering the TFT, a first transparent electrode on a surface of the first passivation layer, and a light blocking structure for preventing light transmission provided at a position, corresponding to a channel of the TFT, on a side of the TFT away from the transparent substrate.

A display substrate includes a switching element disposed in a display region that is electrically connected to a gate line, a data line, and a first electrode in a peripheral region adjacent to the display region that includes a first conductive pattern formed from a first conductive layer that includes a same material as the gate line, a first line connecting part disposed in the peripheral region that includes the first conductive pattern, a second conductive pattern that overlaps the first conductive pattern and formed, an organic layer that partially exposes the second conductive pattern, and a third conductive pattern electrically connected to the second conductive pattern that contacts the partially exposed second conductive pattern, and a fourth conductive pattern that electrically connects the first conductive pattern of the pad part and the third conductive pattern of the first line connecting part.

Embodiments of the present disclosure relate to the field of display technologies, and particularly, to an array substrate and methods of manufacturing and driving the same. With the embodiments of the present disclosure, undesirable phenomenon, e.g. color mixing and so on is avoid in a display device having the array substrate while simplifying the manufacture process of the array substrate. The array substrate comprises a substrate, thin-film transistors, pixel electrodes and a common electrode on the substrate, a plurality of leading wires and a color filter layer; wherein the common electrode comprises a plurality of common electrode blocks reusable as self-capacitance electrodes, and each of the leading wires has one end electrically connected to one of the common electrode blocks and the other end electrically connected to a touch integrated circuit. The array substrate according to the embodiments of the present disclosure is used in the display device.

The present disclosure provides an array substrate and a method for producing the same and a liquid crystal display apparatus. The array substrate provided by an embodiment of the present invention comprises: a base substrate; a plurality of sub-pixel regions which are delimited by gate lines and data lines respectively and which are located on the base substrate, each of which is provided with a thin film transistor TFT and a common electrode above the thin film transistor; and an alignment film located above the common electrode, wherein the alignment film has an alignment direction at a predetermined angle to the direction in which the gate lines extend, and a void region is arranged at a location of the common electrode corresponding to the thin film transistor, the direction in which the void region extends being identical to the alignment direction of the alignment film.

An electronic device includes: a substrate; a first all-solid-state secondary cell provided on the substrate, the first all-solid-state secondary cell including a first electrode layer, a solid electrolyte layer, and a second electrode layer; a first transistor including a first source drain, a second source drain electrically connected to the second electrode layer, and a first gate electrode; a first terminal electrically connected to the first electrode layer; a second terminal to control a potential of the first gate electrode; a third terminal electrically connected to the first source drain; and a sealing layer covering the first all-solid-state secondary cell and the first transistor, wherein the first terminal, the second terminal, and the third terminal are exposed on an upper surface of the sealing layer.

The present invention provides a method for manufacturing a TFT substrate and a structure thereof. The method for manufacturing a TFT substrate uses a gray tone mask to apply a single photolithographic process to simultaneously manufacture a gate insulation layer, a semiconductor layer, and a etch stop so as to reduce the number of the photolithographic processes used from ten processes to eight processes and reduce the number of masks used thereby simplifying the manufacturing process and effectively increasing the manufacturing efficiency and the yield rate. The TFT substrate structure of the present invention includes a gate insulation layer, a semiconductor layer, and an etch stop layer that are manufactured at the same time with a photolithographic process by using a gray tone mask so that the structure is simple, the manufacturing is easy, and the manufacturing efficiency and yield rate are effectively increased.