Patent classifications
H10D86/421
THIN FILM TRANSISTOR AND TRANSISTOR ARRAY SUBSTRATE
There is provided a thin film transistor comprises a substrate; a semiconductor layer disposed on the substrate and including a channel area, a first conductive area connected to one side of the channel area, and a second conductive area connected to the other side of the channel area; a gate insulating layer covering areas other than the first conductive area and the second conductive area in the semiconductor layer; a gate electrode disposed on the gate insulating layer and overlapping the channel area in a plan view; and a first electrode disposed on the gate insulating layer on the one side of the channel area and in contact with a portion of the first conductive area. A first edge of the first electrode facing the gate electrode obliquely intersects a first edge of the gate insulating layer in a plan view.
Display substrate, manufacturing method thereof, and display device
The present disclosure provides a display substrate, a manufacturing method thereof, and a display device. The display substrate includes a base substrate and a plurality of pixels arranged on the base substrate, each pixel includes a plurality of sub-pixels, and each sub-pixel includes a first active layer, a first gate insulation layer, a gate electrode, a second gate insulation layer, a second active layer, a first insulation layer, a source electrode and a drain electrode laminated one on another. The source electrode is connected with the first active layer through a via hole penetrating through the first insulation layer, the second gate insulation layer and the first gate insulation layer, and the source electrode and the drain electrode are connected with the second active layer through a via hole penetrating through the first insulation layer.
Display unit and electronic apparatus including pixel and channel region arrangements
A display unit of the present disclosure includes a plurality of pixel circuits each including a light-emitting element, a drive transistor that has a drain and a source and supplies a current to the light-emitting element, and a control transistor connected to the drain or the source of the drive transistor. One channel portion is formed for two control transistors in respective adjacent two of the pixel circuits.
ELECTRONIC DEVICE
An electronic device includes a substrate, two adjacent transistors, a scan line, and two adjacent metal elements. The two adjacent transistors are disposed on the substrate and arranged along a first direction. A first transistor of the two adjacent transistors includes a first active element and a first conductive element electrically connected to the first active element. The two adjacent metal elements are disposed on the substrate and spaced apart from each other along the first direction. In a cross section view along a normal direction of the electronic device, a distance between the first active element and the substrate is greater than a distance between one of the two adjacent metal elements and the substrate. Projections of the first conductive element and the first active element on the substrate are located between projections of the two adjacent metal elements on the substrate.
Array substrate and method for manufacturing same, and display device
Provided is an array substrate. The array substrate includes a base substrate, a gate line, a data line, a discharge line, a first pixel electrode, a first thin film transistor, a second thin film transistor and a first connection line. A control electrode of the first thin film transistor and a control electrode of the second thin film transistor are both connected to the gate line. The first electrode of the first thin film transistor is connected to the data line. Both the second electrode of the first thin film transistor and the first electrode of the second thin film transistor are connected to the first pixel electrode by the first connection line. The second electrode of the second thin film transistor is connected to the discharge line.
DISPLAY PANEL AND DISPLAY DEVICE
A display panel and a display device are provided. The display panel includes a display area, including a first display area and repeating units that including a first light-emitting element column, a second light-emitting element column, a third light-emitting element column and a fourth light-emitting element column. The second light-emitting element column and the fourth light-emitting element column each includes a third color light-emitting element, and third color light-emitting elements in the second light-emitting column and the fourth light-emitting element column are arranged in a staggered manner in the first direction. In a direction perpendicular to a plane of the display panel, a light-emitting element includes an anode, a light-emitting material layer and a cathode stacked in sequence; and in the first display area, in the direction perpendicular to the plane, in the third color light-emitting element, a shape of the anode includes an arc-shaped edge.
DISPLAY DEVICE AND ELECTRONIC APPARATUS
Provided is a display device including: a pixel unit in which a plurality of pixel circuits (PIX_A, PIX_B, PIX_C) each of which includes a light emitting element and a driving circuit configured to drive the light emitting element are arranged in a matrix form. In a diffusion layer in which transistors included in the driving circuits of the pixel circuits (PIX_A, PIX_B, PIX_C) are formed, an electricity supply region (223) that is an active area for supplying an electric potential to a well is provided between mutually adjacent ones of the pixel circuits (PIX_A, PIX_B, PIX_C).
Semiconductor device
Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.
Thin film transistor, method for manufacturing the same, and semiconductor device
In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
Manufacturing method of array substrate, array substrate and display device
The present invention provides an array substrate and a manufacturing method thereof and a display device. The manufacturing method comprises: forming a pattern including a pixel electrode and a source of a thin film transistor on a base substrate through a single patterning process, the pixel electrode is provided in a layer under a layer in which the source is located; forming a pattern including a drain, an active layer, a gate insulation layer and a gate of the thin film transistor through a single patterning process, the active layer covers the source and the drain, and is separated from the gate through the gate insulation layer; and forming a pattern including a passivation layer, a common electrode and a gate line through a single patterning process, the common electrode is a slit electrode and separated from the active layer and the pixel electrode through the passivation layer.