H10H20/84

METHOD FOR MANUFACTURING LIGHT EMITTING DIODE

A light emitting diode includes a first electrode, a second electrode, and an epitaxial structure. The epitaxial structure is arranged on the first electrode, and electrically connects with the first electrode and the second electrode. The second electrode surrounds periphery of the epitaxial structure to reflect light from the epitaxial structure out from the top of the epitaxial structure. A method for manufacturing the light emitting diode is also presented. The light emitting diode and the method increase lighting efficiency of the light emitting diode.

Method for manufacturing nano-structured semiconductor light-emitting element

There is provided a method for manufacturing a nanostructure semiconductor light emitting device, including: forming a mask having a plurality of openings on a base layer; growing a first conductivity-type semiconductor layer on exposed regions of the base layer such that the plurality of openings are filled, to form a plurality of nanocores; partially removing the mask such that side surfaces of the plurality of nanocores are exposed; heat-treating the plurality of nanocores after partially removing the mask; sequentially growing an active layer and a second conductivity-type semiconductor layer on surfaces of the plurality of nanocores to form a plurality of light emitting nanostructures, after the heat treatment; and planarizing upper parts of the plurality of light emitting nanostructures such that upper surfaces of the nanocores are exposed.

LIGHT EMITTING ELEMENT AND LIGHT EMITTING DEVICE
20170365738 · 2017-12-21 ·

A light emitting element includes an n-side semiconductor layer, a p-side semiconductor layer, a plurality of holes, a first p-electrode, a second p-electrode and an n-electrode. The n-side semiconductor layer has a hexagonal shape in plan view. The p-side semiconductor layer has a hexagonal shape in plan view and provided over the n-side semiconductor layer. The holes are arranged in the p-side semiconductor layer so that the n-side semiconductor layer is exposed through the plurality of holes. The first p-electrode is in contact with the p-side semiconductor layer. The second p-electrode is arranged on the first p-electrode adjacent to a corner corresponding to one of vertices of the hexagonal shape. The second p-electrode has sides that are respectively parallel to sides defining the corner in plan view. The n-electrode is arranged over the first p-electrode and is electrically connected to the n-side semiconductor layer through the plurality of holes.

Method of manufacturing light emitting device including metal patterns and cut-out section
09847463 · 2017-12-19 · ·

A light emitting device includes a support member having a mounting surface. The support member includes an insulating member having top surface and a plurality of side surfaces, a first metal pattern disposed on the top surface of the insulating member, and a second metal pattern disposed on the side surface of the insulating member such that a side surface of the second metal pattern is continuous with a top surface of the first metal pattern. The light emitting device further includes a light emitting element mounted on the mounting surface at a location of the first metal pattern, and a bonding member that bonds the light emitting element to the mounting surface. The bonding member covers at least a portion of the first metal pattern and at least a portion of the second metal pattern.

Display apparatus
09846335 · 2017-12-19 · ·

A display apparatus includes a first base substrate including an effective area and a pad area adjacent to the effective area, a second base substrate on the first base substrate to overlap the effective area and expose the pad area of the first base substrate at a side surface of the second base substrate, a spacer on the exposed pad area of the first base substrate and facing the side surface of the second base substrate, the spacer being spaced apart from the side surface of the second base substrate, a sealant between the spacer and the side surface of the second base substrate to contact both the spacer and the side surface of the second base substrate, and an optical film on the second base substrate, the optical film extended further than the side surface of the second base substrate to overlap the sealant and the spacer.

LED WITH STRESS-BUFFER LAYER UNDER METALLIZATION LAYER
20170358715 · 2017-12-14 ·

Semiconductor LED layers are epitaxially grown on a patterned surface of a sapphire substrate. The patterned surface improves light extraction. The LED layers include a p-type layer and an n-type layer. The LED layers are etched to expose the n-type layer. One or more first metal layers are patterned to electrically contact the p-type layer and the n-type layer to form a p-metal contact and an n-metal contact. A dielectric polymer stress-buffer layer is spin-coated over the first metal layers to form a substantially planar surface over the first metal layers. The stress-buffer layer has openings exposing the p-metal contact and the n-metal contact. Metal solder pads are formed over the stress-buffer layer and electrically contact the p-metal contact and the n-metal contact through the openings in the stress-buffer layer. The stress-buffer layer acts as a buffer to accommodate differences in CTEs of the solder pads and underlying layers.

SYSTEMS AND METHODS FOR PREPARING GaN AND RELATED MATERIALS FOR MICRO ASSEMBLY
20170358703 · 2017-12-14 ·

The disclosed technology relates generally to a method and system for micro assembling GaN materials and devices to form displays and lighting components that use arrays of small LEDs and high-power, high-voltage, and or high frequency transistors and diodes. GaN materials and devices can be formed from epitaxy on sapphire, silicon carbide, gallium nitride, aluminum nitride, or silicon substrates. The disclosed technology provides systems and methods for preparing GaN materials and devices at least partially formed on several of those native substrates for micro assembly.

LED package

A method for manufacturing a light emitting diode (LED) die includes providing an LED die including a substrate, an N type semiconductor layer, an active layer, and a P type semiconductor layer grown on the substrate in sequence. The N type semiconductor layer, the active layer, and the P type semiconductor layer are etched to define a plurality of recesses and a groove. An insulating layer to cover side surfaces of the recesses and the P type semiconductor layer is formed and a portion of the insulating layer is etched to define an opening to expose a top portion of the P type semiconductor layer. A pair of electrodes is formed and the LED die is cut along the groove to obtain an individual LED die.

LIGHT EMITTING DIODE FOR SURFACE MOUNT TECHNOLOGY, METHOD OF MANUFACTURING THE SAME, AND METHOD OF MANUFACTURING LIGHT EMITTING DIODE MODULE

A light emitting diode (LED) includes a substrate, a first semiconductor layer disposed on the substrate, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, a first conductive layer disposed on a portion of the second semiconductor layer, a second conductive layer disposed on the second semiconductor layer, and an insulation layer including a first insulating layer and a second insulating layer disposed on the first insulating layer, and overlapping the first semiconductor layer, the second semiconductor layer, and the second conductive layer, in which the insulation layer has a first region having different thicknesses and a second region having a substantially constant thickness.

Light emitting device and light emitting device package

Disclosed are a light emitting device and a light emitting device package. The light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer, an adhesive layer contacting a top surface of the first conductive semiconductor layer, a first electrode contacting a top surface of the first conductive semiconductor and a top surface of the adhesive layer, and a second electrode contacting the second conductive semiconductor layer, wherein the adhesive layer contacting the first electrode is spaced apart from the second electrode.