[Object] To provide a semiconductor device capable of improving a discharge starting voltage when measuring electric characteristics, and widening a pad area of a surface electrode or increasing the number of semiconductor devices (number of chips) to be obtained from one wafer, and a method for manufacturing the same.

[Solution Means] A semiconductor device 1 includes an n-type SiC layer 2 having a first surface 2A, a second surface 2B, and end faces 2C, a p-type voltage relaxing layer 7 formed in the SiC layer 2 so as to be exposed to the end portion of the first surface 2A of the SiC layer 2, an insulating layer 8 formed on the SiC layer 2 so as to cover the voltage relaxing layer 7, and an anode electrode 9 that is connected to the first surface 2A of the SiC layer 2 through the insulating layer 8 and has a pad area 95 selectively exposed.

A semiconductor device is provided that is excellent in semiconductor properties and Schottky characteristics. A semiconductor device includes: a semiconductor layer containing a crystalline oxide semiconductor with a corundum structure as a major component; and a Schottky electrode on the semiconductor layer, wherein the Schottky electrode is formed by containing a metal of Groups 4-9 of the periodic table, thereby manufacturing a semiconductor device excellent in semiconductor properties and Schottky characteristics without impairing the semiconductor properties to use the semiconductor device thus obtained for a power device and the like.

A target made of a metal material is sputtered to form a metal film on a silicon carbide wafer. At this time, the metal film is formed under a condition that an incident energy of incidence, on the silicon carbide wafer, of the metal material sputtered from the target and a sputtering gas flowed in through a gas inlet port is lower than a binding energy of silicon carbide, and more specifically lower than 4.8 eV. For example, the metal film is formed while a high-frequency voltage applied between a cathode and an anode is set to be equal to or higher than 20V and equal to or lower than 300V.

A semiconductor device includes a first conductivity type semiconductor layer that includes a wide bandgap semiconductor and a surface. A trench, including a side wall and a bottom wall, is formed in the semiconductor layer surface, and a Schottky electrode is connected to the surface. Opposite edge portions of the bottom wall of the trench each include a radius of curvature, R, satisfying the expression 0.01 L<R<10 L, where L represents the straight-line distance in a width direction of the trench between the opposite edge portions.

An object is to provide a semiconductor device having good electrical characteristics. A gate insulating layer having a hydrogen concentration less than 610.sup.20 atoms/cm.sup.3 and a fluorine concentration greater than or equal to 110.sup.20 atoms/cm.sup.3 is used as a gate insulating layer in contact with an oxide semiconductor layer forming a channel region, so that the amount of hydrogen released from the gate insulating layer can be reduced and diffusion of hydrogen into the oxide semiconductor layer can be prevented. Further, hydrogen present in the oxide semiconductor layer can be eliminated with the use of fluorine; thus, the hydrogen content in the oxide semiconductor layer can be reduced. Consequently, the semiconductor device having good electrical characteristics can be provided.

A semiconductor apparatus includes a substrate, a semiconductor layer formed above the substrate and including a nitride semiconductor, an electrode formed above the semiconductor layer and including gold, a barrier film formed above the electrode and a protection film formed above the semiconductor layer and including one of a silicon oxide film, a silicon nitride film, and a silicon oxynitride film. The protection film is formed on the barrier film. The barrier film includes a metal oxide material, a metal nitride film, or a metal oxynitride film.

An embodiment of a semiconductor device includes a semiconductor substrate that includes an upper surface and a channel, a gate electrode disposed over the substrate electrically coupled to the channel, and a Schottky metal layer disposed over the substrate adjacent the gate electrode. The Schottky metal layer includes a Schottky contact electrically coupled to the channel which provides a Schottky junction and at least one alignment mark disposed over the semiconductor substrate. A method for fabricating the semiconductor device includes creating an isolation region that defines an active region along an upper surface of a semiconductor substrate, forming a gate electrode over the semiconductor substrate in the active region, and forming a Schottky metal layer over the semiconductor substrate. Forming the Schottky metal layer includes forming at least one Schottky contact electrically coupled to the channel and providing a Schottky junction, and forming an alignment mark in the isolation region.

A method for manufacturing a semiconductor element, including forming a metal film, which contains at least one metal selected from the group consisting of titanium, tungsten, molybdenum, and chromium, on a first surface of a substrate formed of silicon carbide, and forming a metal silicide film by causing a silicide reaction within an interface between the substrate and the metal film by irradiating the metal film with a pulsed laser beam having a wavelength within a range of 330 nm to 370 nm.

A semiconductor device includes a semiconductor layer including a Ga.sub.2O.sub.3-based single crystal, and an electrode that is in contact with a surface of the semiconductor layer. The semiconductor layer is in Schottky-contact with the electrode and has an electron carrier concentration based on reverse withstand voltage and electric field-breakdown strength of the Ga.sub.2O.sub.3-based single crystal.

A method for manufacturing a semiconductor device having an SiC-IGBT and an SiC-MOSFET in a single semiconductor chip, including forming a second conductive-type SiC base layer on a substrate, and selectively implanting first and second conductive-type impurities into surfaces of the substrate and base layer to form a collector region, a channel region in a surficial portion of the SiC base layer, and an emitter region in a surficial portion of the channel region, the emitter region serving also as a source region of the SiC-MOSFET.