A light-emitting device comprising: a supportive substrate; a transparent layer formed on the supportive substrate, and the transparent layer comprising conductive metal oxide material; a light-emitting stacked layer comprising an active layer formed on the transparent layer; and an etching-stop layer formed between the light-emitting stacked layer and the supportive substrate and contacting the transparent layer, wherein a thickness of the etching-stop layer is thicker than that of the transparent layer.

An optoelectronic semiconductor component includes a layer stack based on a nitride compound semiconductor and has an n-type semiconductor region , a p-type semiconductor region and an active layer arranged between the n-type semiconductor region and the p-type semiconductor region. In order to form an electron barrier, the p-type semiconductor region includes a layer sequence having a plurality of p-doped layers composed of Al.sub.xIn.sub.yGa.sub.1xyN where 0<=x<=1, 0<=y<=1 and x+y<=1. The layer sequence includes a first p-doped layer having an aluminum proportion x1>=0.5 and a thickness of not more than 3 nm, and the first p-doped layer, at a side facing away from the active layer, is succeeded by at least a second p-doped layer having an aluminum proportion x2<x1 and a third p-doped layer having an aluminum proportion x3<x2.

A solution for designing and/or fabricating a structure including a quantum well and an adjacent barrier is provided. A target band discontinuity between the quantum well and the adjacent barrier is selected to coincide with an activation energy of a dopant for the quantum well and/or barrier. For example, a target valence band discontinuity can be selected such that a dopant energy level of a dopant in the adjacent barrier coincides with a valence energy band edge for the quantum well and/or a ground state energy for free carriers in a valence energy band for the quantum well. Additionally, a target doping level for the quantum well and/or adjacent barrier can be selected to facilitate a real space transfer of holes across the barrier. The quantum well and the adjacent barrier can be formed such that the actual band discontinuity and/or actual doping level(s) correspond to the relevant target(s).

Semiconductor structures include an active region between a plurality of layers of InGaN. The active region may be at least substantially comprised by InGaN. The plurality of layers of InGaN include at least one well layer comprising In.sub.wGa.sub.1-wN, and at least one barrier layer comprising In.sub.bGa.sub.1-bN proximate the at least one well layer. In some embodiments, the value of w in the In.sub.wGa.sub.1-wN of the well layer may be greater than or equal to about 0.10 and less than or equal to about 0.40 in some embodiments, and the value of b in the In.sub.bGa.sub.1-bN of the at least one barrier layer may be greater than or equal to about 0.01 and less than or equal to about 0.10. Methods of forming semiconductor structures include growing such layers of InGaN to form an active region of a light emitting device, such as an LED. Luminary devices include such LEDs.

A light emitting diode including a first light emitting cell and a second light emitting cell disposed on a substrate and spaced apart from each other to expose a surface of the substrate, a first transparent layer disposed on and electrically connected to the first light emitting cell, first connection section disposed on a portion of the first light emitting cell, a second connection section disposed on a portion of the second light emitting cell, a first interconnection and a second interconnection electrically connecting the first light emitting cell and the second light emitting cell, and an insulation layer disposed between the first and second interconnections and a side surface of the first light emitting cell.

A semiconductor structure comprising a buffer structure and a set of semiconductor layers formed adjacent to a first side of the buffer structure is provided. The buffer structure can have an effective lattice constant and a thickness such that an overall stress in the set of semiconductor layers at room temperature is compressive and is in a range between approximately 0.1 GPa and 2.0 GPa. The buffer structure can be grown using a set of growth parameters selected to achieve the target effective lattice constant a, control stresses present during growth of the buffer structure, and/or control stresses present after the semiconductor structure has cooled.

The light emitting element is provided to comprise: a first conductive type semiconductor layer; a mesa; a current blocking layer; a transparent electrode; a first electrode pad and a first electrode extension; a second electrode pad and a second electrode extension; and an insulation layer partially located on the lower portion of the first electrode, wherein the mesa includes at least one groove formed on a side thereof, the first conductive type semiconductor layer is partially exposed through the groove, the insulation layer includes an opening through which the exposed first conductive type semiconductor layer is at least partially exposed, the first electrode extension includes extension contact portions in contact with the first conductive type semiconductor layer through an opening, and the second electrode extension includes an end with a width different from the average width of the second electrode extension.

The present invention relates to light-emitting diodes (LEDs), and related components, processes, systems, and methods. In certain embodiments, an LED that provides improved optical and thermal efficiency when used in optical systems with a non-rectangular input aperture (e.g., a circular aperture) is described. In some embodiments, the emission surface of the LED and/or an emitter output aperture can be shaped (e.g., in a non-rectangular shape) such that enhanced optical and thermal efficiencies are achieved. In addition, in some embodiments, chip designs and processes that may be employed in order to produce such devices are described.

A radiation-emitting semiconductor chip (1) is specified, comprisinga semiconductor layer sequence (2) having a first main surface (3) and a second main surface (4) situated opposite the first main surface (3) wherein the semiconductor layer sequence (2) has an active zone (5) suitable for generating electromagnetic radiation, a structured mirror layer (6), which is electrically non-conductive during operation and is arranged on the side of the first main surface (3) of the semiconductor layer sequence (2), wherein the mirror layer (6) has at least one mirror region (6A, 6B, 6C) which regionally covers the first main surface (3), at least one encapsulation region (7A, 7B, 7C) which surrounds the at least one mirror region (6A, 6B, 6C) on all sides and is in direct contact with the mirror region (6A, 6B, 6C), wherein the at least one encapsulation region (7A, 7B, 7C); is electrically non-conductive during operation.

This invention discloses a method for the fabrication of GaN-based vertical cavity surface-emitting devices featuring a silicon-diffusion defined current blocking layer (CBL). Such devices include vertical-cavity surface-emitting laser (VCSEL) and resonant-cavity light-emitting diode (RCLED). The silicon-diffused P-type GaN region can be converted into N-type GaN and thereby attaining a current blocking effect under reverse bias. And the surface of the silicon-diffused area is flat so the thickness of subsequent optical coating is uniform across the emitting aperture. Thus, this method effectively reduces the optical-mode field diameter of the device, significantly decreases the spectral width of LED, and produces single-mode emission of VCSEL