H10H20/8162

Vertical light emitting diode and fabrication method

A vertical LED with current blocking structure and its associated fabrication method involve an anisotropic conductive material and a conductive substrate with concave-convex structure. The anisotropic conductive material forms a bonding layer with vertical conduction and horizontal insulation between the concave-convex substrate and the light-emitting epitaxial layer, thereby forming a vertical LED with current blocking function.

Method for producing light emitting semiconductor device

Method for producing a light emitting semiconductor device comprising a zinc magnesium oxide based layer as active layer, wherein the zinc magnesium oxide based layer comprises an aluminum doped zinc magnesium oxide layer having the nominal composition Zn.sub.1-xMg.sub.xO with 1-350 ppm Al, wherein x is in the range of 0<x0.3. The invention further provides a method for the production of such aluminum doped zinc magnesium oxide, the method comprising heat treating a composition comprising Zn, Mg and Al with a predetermined composition at elevated temperatures, and subsequently annealing the heat treated composition to provide said aluminum doped zinc magnesium oxide.

OPTOELECTRONIC DEVICE COMPRISING LIGHT-EMITTING DIODES WITH IMPROVED LIGHT EXTRACTION

An optoelectronic device including a semiconductor substrate having a face, light-emitting diodes arranged on the face and including wired conical or frustoconical semiconductor elements, and an at least partially transparent dielectric layer covering the light-emitting diodes, the refractive index of the dielectric layer being between 1.6 et 1.8.

Nitride Light Emitting Diode

A nitride light emitting diode includes: an n-type nitride layer, a light emitting layer and a p-type nitride layer in sequence, wherein, the light emitting layer is a MQW structure composed of a barrier layer and a well layer, in which, an AlGaN electron tunneling layer is inserted into at least one well layer closing to the n-type nitride layer with barrier height greater than that of the barrier layer; in addition, the barriers of the AlGaN electron tunneling layer and the well layer are high enough so that electrons are difficult to transit towards thermionic emission direction, but mainly transit through tunneling in the InGaN well layers, which confines electron mobility and adjusts electron distribution. Hence, electrons have less chance to spill over into the P-type nitride layer.

BONDING WIRE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE INCLUDING SAME

Provided is a bonding wire for a semiconductor package and a semiconductor package including the same. The bonding wire for the semiconductor package may include a core portion including silver (Ag), and a shell layer surrounding the core portion, having a thickness of 2 nm to 23 nm, and including gold (Au). The semiconductor package may include a package body having a first electrode structure and a second electrode structure, a semiconductor light emitting device comprising a first electrode portion and a second electrode portion electrically connected to the first electrode structure and the second electrode structure, and a bonding wire connecting at least one of the first electrode structure and the second electrode structure to the semiconductor light emitting device.

Group III nitride heterostructure for optoelectronic device

Heterostructures for use in optoelectronic devices are described. One or more parameters of the heterostructure can be configured to improve the reliability of the corresponding optoelectronic device. The materials used to create the active structure of the device can be considered in configuring various parameters the n-type and/or p-type sides of the heterostructure.

Nanostructure semiconductor light emitting device

A nanostructure semiconductor light emitting device includes a base layer, an insulating layer, a plurality of light emitting nanostructures, and a contact electrode. The base layer is formed of a first conductivity-type semiconductor material. The insulating layer is disposed on the base layer. Each light emitting nanostructure is disposed in a respective opening of a plurality of openings in the base layer, and includes a nanocore formed of the first conductivity-type semiconductor material, and an active layer and a second conductivity-type semiconductor layer sequentially disposed on a surface of the nanocore. The contact electrode is spaced apart from the insulating layer and is disposed on a portion of the second conductivity-type semiconductor layer. A tip portion of the light emitting nanostructure has crystal planes different from those on side surfaces of the light emitting nanostructure.

SEMICONDUCTOR LIGHT-EMITTING DEVICE
20170133552 · 2017-05-11 ·

A semiconductor light-emitting device including a P-type semiconductor cladding layer, an N-type semiconductor layer, a light-emitting layer, and a hole injection layer is provided. The P-type semiconductor cladding layer is doped with magnesium. The light-emitting layer is disposed between the P-type semiconductor cladding layer and the N-type semiconductor layer. The hole injection layer is disposed between the P-type semiconductor cladding layer and the light-emitting layer. The hole injection layer includes a first super lattice structure formed by alternately stacking a plurality of magnesium nitride layers and a plurality of semiconductor material layers. The chemical formula of each of the semiconductor material layers is Al.sub.xIn.sub.yGa.sub.1-x-yN, and 0x1, 0y1, and 0x+y1.

Optoelectronic semiconductor chip

An optoelectronic semiconductor chip includes a semiconductor layer sequence having an active layer that generates radiation and at least one n-doped layer adjoining the active layer, the semiconductor layer sequence is based on AlInGaN or on InGaN, one or a plurality of central layers composed of AlGaN each having thicknesses of 25 nm to 200 nm are grown at a side of the n-doped layer facing away from a carrier substrate, a coalescence layer of doped or undoped GaN having a thickness of 300 nm to 1.2 m is formed at a side of the central layer or one of the central layers facing away from the carrier substrate, a roughening extends from the coalescence layer as far as or into the n-doped layer, a radiation exit area of the semiconductor layer stack is formed partly by the coalescence layer, and the central layer is exposed in places.

Optoelectronic device with modulation doping

An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The p-type contact layer and electron blocking layer can be doped with a p-type dopant. The dopant concentration for the electron blocking layer can be at most ten percent the dopant concentration of the p-type contact layer. A method of designing such a heterostructure is also described.