A semiconductor structure includes a semiconductor substrate having a gate electrode in a gate trench, a buried bus in the semiconductor substrate, the buried bus having a bus conductive filler in a bus trench, where the bus conductive filler is electrically coupled to the gate electrode. The bus conductive filler is surrounded by the gate electrode. The gate trench intersects the bus trench in the semiconductor substrate. The gate electrode includes polysilicon. The bus conductive filler includes tungsten. The semiconductor structure also includes an adhesion promotion layer interposed between the bus conductive filler and the gate electrode, where the adhesion promotion layer includes titanium and titanium nitride. The semiconductor structure also includes a dielectric layer covering the gate electrode over the semiconductor substrate, where the buried bus has a coplanar top surface with the dielectric layer.

By using a single trench mask, first and second trenches are formed that extend from a main surface into a semiconductor layer. A foundation is formed that includes first regions in and/or directly adjoining the first trenches. A superstructure is formed in alignment with the foundation by using position information directly obtained from structures formed in the first and/or the second trenches.

A monolithically integrated bidirectional switch includes: an input terminal; an output terminal; a control terminal; a compound semiconductor substrate; a common drift region in the compound semiconductor substrate and in series between the input terminal and the output terminal; a first gate; and a second gate. One of the first gate and the second gate is a normally-on gate and the other one of the first gate and the second gate is a normally-off gate, such that the monolithically integrated bidirectional switch is configured to conduct current in a single direction from the input terminal to the output terminal through the common drift region. A corresponding power electronic system that uses the monolithically integrated bidirectional switch is also described.

A semiconductor device comprises a silicon carbide based semiconductor layer structure that comprises an active region. A gate trench is provided in an upper portion of the semiconductor layer structure, the gate trench having a first rounded lower corner and a second rounded lower corner. A gate electrode is provided in the gate trench. Within the active region, an upper surface of the gate electrode is below or coplanar with an upper surface of the semiconductor layer structure.

A power semiconductor device includes: a semiconductor body having a first surface and a mesa portion that includes a surface part of the first surface and a body region; at least two trenches extending from the first surface into the semiconductor body along a vertical direction, each trench including a trench electrode and trench insulator insulating the trench electrode from the semiconductor body, the mesa portion being laterally confined by the trenches in a first vertical cross-section along a first lateral direction; and a contact plug in contact with the body region. The contact plug and trench electrode of a first trench laterally overlap at least partially in the first vertical cross-section. A protection structure having a portion arranged within the first trench is arranged between the contact plug and trench electrode of the first trench. The protection structure may be an electrically insulation structure or a protective device structure.

A semiconductor device includes substrate, a first gate structure, a second gate structure, and an epitaxy layer. The first gate structure and the second gate structure are over the substrate, in which the first gate structure and the second gate structure each comprises a shielding electrode, a gate electrode over the shielding electrode, and a first gate dielectric layer vertically separating the shielding electrode from the gate electrode. The epitaxy layer is over the substrate and cups an underside of the first gate structure and the second gate structure, in which the epitaxy layer comprises a doped region laterally between the first gate dielectric layer of the first gate structure and the first gate dielectric layer of the second gate structure, a dopant concentration of the doped region being non-uniform along a lateral direction.

Wide bandgap trench gate semiconductor devices are provided. In one example, a semiconductor device includes a wide bandgap semiconductor structure. The wide bandgap semiconductor structure includes a drift region of a first conductivity type and a well region of a second conductivity type. The semiconductor device includes a gate trench in the wide bandgap semiconductor structure. The gate trench extends through the well region into the drift region. The semiconductor device includes a buried gate structure in the gate trench. The buried gate structure includes a gate polysilicon layer and a gate silicide layer.

A method of manufacturing a semiconductor device, including preparing a semiconductor substrate having a main surface, forming a device element structure on the main surface, forming a protective film on the main surface of the semiconductor substrate to protect the device element structure, the protective film having an opening therein, forming at least one material film in a predetermined pattern on the main surface of the semiconductor substrate and in the opening of the protective film, the at least one material film being separate from the protective film by a distance of less than 1 mm, forming a resist film on the main surface of the semiconductor substrate, covering the protective film and the at least one material film, the resist film having an opening therein corresponding to an inducing region for impurity defects, and inducing the impurity defects in the semiconductor substrate, using the resist film as a mask.

A semiconductor device includes an IGBT in an IGBT portion of a semiconductor body and a diode in a diode portion of the semiconductor body. The diode includes an anode region of a first conductivity type and confined by diode trenches along a first lateral direction. Each of the diode trenches includes a diode trench electrode and a diode trench dielectric. A first contact groove extends into the anode region along a vertical direction from the first surface of the semiconductor body. An anode contact region of the first conductivity type adjoins a bottom side of the first contact groove. A cathode contact region of a second conductivity type adjoins a second surface of the semiconductor body opposite to the first surface. The IGBT includes a gate trench including a gate electrode and a gate dielectric, a source region, an emitter electrode, a drift region, and a second contact groove.

A method of manufacturing an insulated gate bipolar transistor (IGBT) device comprising 1) preparing a semiconductor substrate with an epitaxial layer of a first conductivity type supported on the semiconductor substrate of a second conductivity type; 2) applying a gate trench mask to open a first trench and second trench followed by forming a gate insulation layer to pad the trench and filling the trench with a polysilicon layer to form the first trench gate and the second trench gate; 3) implanting dopants of the first conductivity type to form an upper heavily doped region in the epitaxial layer; and 4) forming a planar gate on top of the first trench gate and apply implanting masks to implant body dopants and source dopants to form a body region and a source region near a top surface of the semiconductor substrate.