A photovoltaic device includes a substrate, a back contact layer disposed above the substrate, and an absorber layer disposed above the back contact layer. The absorber layer includes at least two regions at respectively different horizontally locations. Each respective region has a respectively different concentration profile of an ingredient at a respective depth of the absorber layer.

An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The p-type contact layer and electron blocking layer can be doped with a p-type dopant. The dopant concentration for the electron blocking layer can be at most ten percent the dopant concentration of the p-type contact layer. A method of designing such a heterostructure is also described.

The present invention relates to an exclusive alloy substrate material for CIGS solar cells. Particularly, the present invention provides a substrate material having a thermal expansion coefficient similar to that of a CIGS layer. The substrate material according to the present invention may prevent damage such as interlayer separation due to differing thermal expansion coefficients from occurring because the substrate material has a thermal expansion coefficient similar to that of the CIGS layer.

A photodetection circuit includes an avalanche photodiode and a mode switching circuit that may be configured to selectively switch an operating mode of the photodetection circuit between linear mode and Geiger mode. The photodetection circuit may further include a quenching circuit configured to quench and reset the avalanche photodiode in response to an avalanche event when the photodetection circuit is operated in Geiger mode. The photodetection circuit may additionally include an integration circuit configured to integrate photocurrent output by the photodiode and generate integrated charge units when the photodetection circuit is operated in linear mode. The photodetection circuit may also include a counter configured to count pulses output by the avalanche photodiode when the photodetection circuit is operated in Geiger mode and to count integrated charge units generated by the integration circuit when the photodetection circuit is operated in linear mode.

Systems and methods for advanced ultra-high-performance InP solar cells are provided. In one embodiment, an InP photovoltaic device comprises: a p-n junction absorber layer comprising at least one InP layer; a front surface confinement layer; and a back surface confinement layer; wherein either the front surface confinement layer or the back surface confinement layer forms part of a High-Low (HL) doping architecture; and wherein either the front surface confinement layer or the back surface confinement layer forms part of a heterointerface system architecture.

This invention relates to the controlled realization of ordered superstructures of octapod-shaped colloidal nanocrystals, formed either in the liquid phase or on a solid substrate. These structures can be applied in many fields of technology.

Various particular embodiments include a method for forming a photodetector, including: forming a structure including a barrier layer disposed between a layer of doped silicon (Si) and a layer of germanium (Ge), the barrier layer including a crystallization window; and annealing the structure to convert, via the crystallization window, the Ge to a first composition of silicon germanium (SiGe) and the doped Si to a second composition of SiGe.

A solar cell module includes a solar cell panel configured to have multiple pieces and a substrate that connects the multiple pieces to each other. The multiple pieces include a first piece and a second piece adjacent to the first piece. Opposing sides of the first piece and the second piece respectively have a mutually fittable shape. A length of the mutually fittable shape is longer than a distance of a straight line which connects both ends of the mutually fittable shape.

Examples of the various techniques introduced here include, but not limited to, a mesa height adjustment approach during shallow trench isolation formation, a transistor via first approach, and a multiple absorption layer approach. As described further below, the techniques introduced herein include a variety of aspects that can individually and/or collectively resolve or mitigate one or more traditional limitations involved with manufacturing PDs and transistors on the same substrate, such as above discussed reliability, performance, and process temperature issues.

An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag, and improves blue response in imaging devices.