H10F10/165

Photovoltaic cell, method for producing the same and photovoltaic module

Disclosed are a photovoltaic cell, a method for producing the same and a photovoltaic module. The method includes providing a silicon wafer; forming a tunneling oxide layer on the silicon wafer and a P-type amorphous silicon layer over the tunneling oxide layer; forming N-type dopants on the P-type amorphous silicon layer; performing laser processing on the N-type dopants to cause the P-type amorphous silicon layer to be converted into an amorphous silicon layer having alternatingly arranged P-type amorphous silicon and N-type amorphous silicon; removing the N-type dopant on the amorphous silicon layer and forming a protective layer over the amorphous silicon layer; performing processing on the protective layer and the amorphous silicon layer to form a groove and a protrusion; subjecting the silicon wafer to further processing to increase a depth of the groove; removing the protective layer; and subjecting the silicon wafer to high temperature processing.

Photovoltaic cell, method for producing the same and photovoltaic module

Disclosed are a photovoltaic cell, a method for producing the same and a photovoltaic module. The method includes providing a silicon wafer; forming a tunneling oxide layer on the silicon wafer and a P-type amorphous silicon layer over the tunneling oxide layer; forming N-type dopants on the P-type amorphous silicon layer; performing laser processing on the N-type dopants to cause the P-type amorphous silicon layer to be converted into an amorphous silicon layer having alternatingly arranged P-type amorphous silicon and N-type amorphous silicon; removing the N-type dopant on the amorphous silicon layer and forming a protective layer over the amorphous silicon layer; performing processing on the protective layer and the amorphous silicon layer to form a groove and a protrusion; subjecting the silicon wafer to further processing to increase a depth of the groove; removing the protective layer; and subjecting the silicon wafer to high temperature processing.

Solar cell and preparation method thereof

A solar cell and a preparation method thereof are provided. A method for preparing the solar cell includes following steps: forming an amorphous silicon layer on a tunneling oxide layer at a first side; forming a doped polycrystalline silicon layer in a first process by a diffusion doping treatment; forming a doped oxide layer on the doped polycrystalline silicon layer in a second process; and after the doped oxide layer is formed, doping the first side selectively and heavily by a laser doping process, and forming a selective emitter region in a heavily doped region.

Solar cell and photovoltaic module

A solar cell and a photovoltaic module. The solar cell includes: a substrate including a front surface and a back surface, a tunneling layer formed on the back surface of the substrate, a doped conductive layer formed on the tunneling layer, an intrinsic polycrystalline silicon layer formed on the doped conductive layer, a first passivation layer formed on the intrinsic polycrystalline silicon layer, and a first electrode formed on the first passivation layer. The first electrode is in contact with the intrinsic polycrystalline silicon layer by running through the first passivation layer and is spaced apart from the tunneling layer. The photovoltaic module includes the solar cell.

Solar cell, method for preparing the same, and photovoltaic module

Provided are a solar cell, a method for preparing a solar cell, and a photovoltaic module, relating to the field of photovoltaics. The solar cell includes a substrate, a dielectric layer and a doped semiconductor layer which are stacked, a passivation layer, and electrodes. The substrate has a first surface. The first surface includes an edge region and a center region. The edge region surrounds the center region. The edge region is substantially flush with or closer to the second surface than the center region. The dielectric layer is formed over the center region. The passivation layer covers the edge region and a surface of the doped semiconductor layer facing away the dielectric layer. The electrodes are located in the center region, and penetrate the passivation layer in a thickness direction to be in electrical contact with the doped semiconductor layer.

Tri-layer semiconductor stacks for patterning features on solar cells

Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.

Tri-layer semiconductor stacks for patterning features on solar cells

Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.

Solar cell emitter region fabrication with differentiated p-type and n-type architectures and incorporating dotted diffusion

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.

Solar cell emitter region fabrication with differentiated p-type and n-type architectures and incorporating dotted diffusion

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating dotted diffusion, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed in a plurality of non-continuous trenches in the back surface of the substrate.

Metallization of solar cells

Approaches for the metallization of solar cells and the resulting solar cells are described. In an example, a method of fabricating a solar cell involves forming a barrier layer on a semiconductor region disposed in or above a substrate. The semiconductor region includes monocrystalline or polycrystalline silicon. The method also involves forming a conductive paste layer on the barrier layer. The method also involves forming a conductive layer from the conductive paste layer. The method also involves forming a contact structure for the semiconductor region of the solar cell, the contact structure including at least the conductive layer.