Patent classifications
H10F77/147
SILICONE RESIN REFLECTIVE SUBSTRATE, MANUFACTURING METHOD FOR SAME, AND BASE MATERIAL COMPOSITION USED IN REFLECTIVE SUBSTRATE
A versatile silicone resin reflective substrate which exhibits high reflectance of high luminance light from an LED light source over a wide wavelength from short wavelengths of approximately 340-500 nm, which include wavelengths from 380-400 nm near lower limit of the visible region, to longer wavelength in the infra-red region. The silicone resin reflective substrate has a reflective layer which contains a white inorganic filler powder dispersed in a three-dimensional cross linked silicone resin, the inorganic filler powder having a high reflective index than the silicone resin. The reflective layer is formed on a support body as a film, a solid, or a sheet. The silicone resin reflective substrate can be easily formed as a wiring substrate, a packaging case or the like, and can be manufactured at low cost and a high rate of production.
METHOD FOR PRODUCING A COATING AND OPTOELECTRONIC SEMICONDUCTOR COMPONENT HAVING A COATING
What is specified is a method for producing a coating comprising the following steps:providing a material source having a top surface and a main coating direction,providing a substrate holder having a top surface,providing at least one base layer, having a coating surface remote from the substrate holder, on the top surface of the substrate,attaching the substrate holder to a rotating arm, which has a length along a main direction of extent of the rotating arm,setting the length of the rotating arm in such a manner that a normal angle () throughout the method is at least 30 and at most 75,applying at least one coating to that side of the base layer which has the coating surface by means of the material source, whereinduring the coating process with the coating, the substrate holder is rotated about a substrate axis of rotation running along the main direction of extent of the rotating arm.
Lateral collection photovoltaics
A nanostructured or microstructured array of elements on a conductor layer together form a device electrode of a photovoltaic or detector structure. The array on the conductor layer has a high surface area to volume ratio configuration defining a void matrix between elements. An active layer or active layer precursors is disposed into the void matrix as a liquid to form a thickness coverage giving an interface on which a counter-electrode is positioned parallel to the conduction layer or as a vapor to form a conformal thickness coverage of the array and conduction layer. The thickness coverage is controlled to enhance collection of at least one of electrons and holes arising from photogeneration, or excitons arising from photogeneration, to the device electrode or a device counter-electrode as well as light absorption in said active layer via reflection and light trapping of said device electrode.
Method of using laser welding to ohmic contact of metallic thermal and diffusion barrier layer for foil-based metallization of solar cells
Methods of fabricating solar cells using a metal-containing thermal and diffusion barrier layer in foil-based metallization approaches, and the resulting solar cells, are described. For example, a method of fabricating a solar cell includes forming a plurality of semiconductor regions in or above a substrate. The method also includes forming a metal-containing thermal and diffusion barrier layer above the plurality of semiconductor regions. The method also includes forming a metal seed layer on the metal-containing thermal and diffusion barrier layer. The method also includes forming a metal conductor layer on the metal seed layer. The method also includes laser welding the metal conductor layer to the metal seed layer. The metal-containing thermal and diffusion barrier layer protects the plurality of semiconductor regions during the laser welding.
Integrated photodetector waveguide structure with alignment tolerance
An encapsulated integrated photodetector waveguide structures with alignment tolerance and methods of manufacture are disclosed. The method includes forming a waveguide structure bounded by one or more shallow trench isolation (STI) structure(s). The method further includes forming a photodetector fully landed on the waveguide structure.
ION IMPLANTATION AND ANNEALING FOR THIN-FILM CRYSTALLINE SOLAR CELLS
A back contact back junction thin-film solar cell is formed on a thin-film semiconductor solar cell. Preferably the thin film semiconductor material comprises crystalline silicon. Base regions, emitter regions, and front surface field regions are formed through ion implantation and annealing processes.
SEMICONDUCTOR LIGHT RECEIVING DEVICE
A semiconductor light receiving device includes a substrate, a semiconductor fine line waveguide provided on the substrate, and a light receiving circuit that is provided on the substrate and that absorbs light propagating through the semiconductor fine line waveguide. The light receiving circuit includes a p type first semiconductor layer, a number of second semiconductor mesa structures provided on the p type first semiconductor layer in such a manner that an n type second semiconductor layer is provided on top of an i type second semiconductor layer, a p side electrode connected to the p type first semiconductor layer in a location between the second semiconductor mesa structures, and an n side electrode connected to the n type second semiconductor layer. The refractive index and the optical absorption coefficient of the second semiconductor layers are greater than the refractive index and the optical absorption coefficient of the first semiconductor layer.
GRAPHENE DEVICE AND METHOD OF OPERATING THE SAME
A graphene device and a method of operating the same are provided. The graphene device includes: an active layer including a plurality of meta atoms spaced apart from each other, each of the meta atoms having a radial shape, and a graphene layer that contacts each of the plurality of meta atoms; and a dielectric layer covering the active layer.
Solid-state imaging device and manufacturing method thereof
A solid-state imaging device includes a photoelectric conversion unit, a transistor, and an element separation region separating the photoelectric conversion unit and the transistor. The photoelectric conversion unit and the transistor constitute a pixel. The element separation region is formed of a semiconductor region of a conductivity type opposite to that of a source region and a drain region of the transistor. A part of a gate electrode of the transistor protrudes toward the element separation region side beyond an active region of the transistor. An insulating film having a thickness substantially the same as that of a gate insulating film of the gate electrode of the transistor is formed on the element separation region continuing from a part thereof under the gate electrode of the transistor to a part thereof continuing from the part under the gate electrode of the transistor.
Fabrication of semiconductor junctions
A method comprises providing a cavity structure on the substrate comprising a first growth channel extending in a first direction, a second growth channel extending in a second direction, wherein the second direction is different from the first direction and the second channel is connected to the first channel at a channel junction, a first seed surface in the first channel, at least one opening for supplying precursor materials to the cavity structure, selectively growing from the first seed surface a first semiconductor structure substantially only in the first direction and in the first channel, thereby forming a second seed surface for a second semiconductor structure at the channel junction, growing in the second channel the second semiconductor structure in the second direction from the second seed surface, thereby forming the semiconductor junction comprising the first and the second semiconductor structure.