An imaging device that has a structure where a transistor is used in common by a plurality of pixels and is capable of imaging with a global shutter system is provided. A transistor that resets the potential of a charge detection portion, a transistor that outputs a signal corresponding to the potential of the charge detection portion, and a transistor that selects a pixel are used in common by the plurality of pixels. A transistor is provided between a power supply line and a photoelectric conversion element. Exposure is performed by turning on the transistor. Imaging data is retained in a charge retention portion by turning off the transistor.

Disclosed is an image sensor, which is characterized by increased strength of adhesion between a photoconductive layer and a front electrode made of aluminum, and which includes a first electrode composed of aluminum, copper or an aluminum-copper alloy on a substrate, a buffer layer formed on the first electrode, a photoconductive layer formed on the buffer layer, and a second electrode formed on the photoconductive layer, wherein the buffer layer includes a material having higher strength of adhesion than the photoconductive layer to the first electrode.

The method of wafer-scale integration of semiconductor devices comprises the steps of providing a semiconductor wafer (1), a further semiconductor wafer (2), which differs from the first semiconductor wafer in at least one of diameter, thickness and semiconductor material, and a handling wafer (3), arranging the further semiconductor wafer on the handling wafer, and bonding the further semiconductor wafer to the semiconductor wafer. The semiconductor device may comprise an electrically conductive contact layer (6) arranged on the further semiconductor wafer (2) and a metal layer connecting the contact layer with an integrated circuit.

A highly sensitive imaging device that can perform imaging even under a low illuminance condition is provided. One electrode of a photoelectric conversion element is electrically connected to one of a source electrode and a drain electrode of a first transistor and one of a source electrode and a drain electrode of a third transistor. The other of the source electrode and the drain electrode of the first transistor is electrically connected to a gate electrode of the second transistor. The other electrode of the photoelectric conversion element is electrically connected to a first wiring. A gate electrode of the first transistor is electrically connected to a second wiring. When a potential supplied to the first wiring is HVDD, the highest value of a potential supplied to the second wiring is lower than HVDD.

An imaging device which can perform imaging with a global shutter system and in which transistors are shared by pixels is provided. The imaging device includes first and second photoelectric conversion elements and first to sixth transistors. Active layers of the first to fourth transistors each include an oxide semiconductor. The imaging device has a configuration in which a reset transistor and an amplifier transistor are shared by a plurality of pixels and can perform imaging with a global shutter system. In addition, the imaging device can be used as a high-speed camera.

A tiled array of hybrid assemblies and a method of forming such an array enables the assemblies to be placed close together. Each assembly comprises first and second dies, with the second die mounted on and interconnected with the first die. Each vertical edge of a second die which is to be located adjacent to a vertical edge of another second die in the tiled array is etched such that the etched edge is aligned with a vertical edge of the first die. Indium bumps are deposited on a baseplate where the hybrid assemblies are to be mounted, and the assemblies are mounted onto respective indium bumps using a hybridizing machine, enabling the assemblies to be placed close together, preferably 10 m. The first and second dies may be, for example. a detector and a readout IC, or an array of LEDs and a read-in IC.

An imaging device with low power consumption is provided. The pixel of the imaging device includes first and second photoelectric conversion elements, and first to fifth transistors. A cathode of the first photoelectric conversion element is electrically connected to the first transistor. An anode of a second photoelectric conversion element is electrically connected to the second transistor. Imaging data of a reference frame is obtained using the first photoelectric conversion element, and then imaging data of a difference detection frame is obtained using the second photoelectric conversion element. After the imaging data of the difference detection frame is obtained, a first potential that is a potential of a signal output from the pixel and a second potential that is a reference potential are compared. Whether or not there is a difference between the imaging data of the reference frame and the imaging data of the difference detection frame is determined using the first potential and the second potential.

A tiled array of hybrid assemblies and a method of forming such an array enables the assemblies to be placed close together. Each assembly comprises first and second dies, with the second die mounted on and interconnected with the first die. Each vertical edge of a second die which is to be located adjacent to a vertical edge of another second die in the tiled array is etched such that the etched edge is aligned with a vertical edge of the first die. Indium bumps are deposited on a baseplate where the hybrid assemblies are to be mounted, and the assemblies are mounted onto respective indium bumps using a hybridizing machine, enabling the assemblies to be placed close together, preferably 10 m. The first and second dies may be, for example. a detector and a readout IC, or an array of LEDs and a read-in IC.

An imaging device with low power consumption is provided. A pixel circuit has a configuration of detecting difference data between data of a reference frame and data of a target frame in a pixel, and a peripheral circuit has a configuration of efficiently converting the difference data by A/D conversion so as to obtain high compressibility. Difference data which is encoded by compression is written into a memory element and read sequentially. At this time, the frequency of a clock signal can be lowered in accordance with the amount of data. The read data is expanded and the expanded data is added to the reference frame to constitute an image.

A substrate-removed, surface passivated, and anti-reflective (AR) coated detector assembly is provided. The assembly has an AR coating or passivation layer which includes a wide bandgap thin-film dielectric/passivation layer integrated therein. The wide bandgap thin-film dielectric/passivation layer is positioned proximal to a back interface of a substrate-removed detector assembly. A method of manufacturing the detector assembly includes etching a backside of a partially-removed-substrate detector assembly to obtain an etched detector assembly removed from a substrate. A wide bandgap layer is deposited, in a vacuum chamber, on the etched detector assembly without utilizing an adhesive layer. Additional anti-reflective coating layers are deposited, in the same vacuum chamber, on the wide bandgap layer to form an anti-reflective coating layer with the wide bandgap layer integrated therein. The wide bandgap layer is positioned proximal to an interface portion between the anti-reflective coating layer and the detector assembly.