An organic light emitting display device includes a substrate, a first transistor disposed on the substrate in the opaque region, a second transistor disposed on the substrate in the opaque region, the second transistor being adjacent to the first transistor along a first direction, and a capacitor disposed on the substrate in the opaque region, the capacitor being adjacent to the first transistor along a second direction different from the first direction. Here, the capacitor may include a first capacitor electrode, a dielectric structure including silicon oxynitride and a second capacitor electrode.

An array substrate includes a base substrate (10) and a gate line (11) and a data line (12) provided on the base, the gate line (11) and the data line (12) define a pixel unit, and in the pixel unit, a thin film transistor (13) is provided, the thin film transistor (13) includes a gate electrode (131), a gate insulation layer (132), an active layer (133), a source electrode (134) and a drain electrode (135). The gate insulation layer (132) includes a first gate insulation portion (1321) and a second gate insulation portion (1322), the gate electrode (131) is located between the first gate insulation portion (1321) and the second gate insulation portion (1322), and the second gate insulation portion (1322) is located between the gate electrode (131) and the active layer (133). The array substrate further includes a conductive pad (114), and a first via (15) corresponding to the conductive pad (114) is provided in the gate insulation layer (132) at both sides of the gate line (11), and the data line (12) is connected to the conductive pad (114) through the first via (15). The array substrate is capable of improving the definition, the resolution and the aperture ratio of a display device. A manufacturing method for an array substrate and a display device including such an array substrate are also disclosed.

Embodiments of the disclosure disclose a transistor with floating gate electrode, a manufacturing method thereof, an application method thereof and a display driving circuit. The transistor with floating gate electrode includes a substrate (1), and a floating gate electrode (3), a source electrode (4), a drain electrode (5) and a control gate electrode (6) disposed on the substrate (1). The transistor with floating gate electrode further comprises a first insulating film (7) and a polysilicon film (8) that are sequentially disposed on the substrate (1), and a channel region (2) is formed in the polysilicon film (8) at a position corresponding to the floating gate electrode (3).

A thin film transistor (TFT) substrate in which properties of a TFT may be modified according to a function of the TFT, a display apparatus including the TFT substrate, a method of manufacturing the TFT substrate, and a method of manufacturing the display apparatus. The thin film transistor (TFT) substrate includes a substrate; a first TFT disposed on the substrate and comprising a first active pattern and a first gate electrode at least partially overlapping with the first active pattern and disposed between the substrate and the first active pattern; and a second TFT disposed on the substrate and comprising a second active pattern and a second gate electrode at least partially overlapping with the second active pattern.

The instant invention provides a pixel structure. The pixel structure includes a substrate, a gate electrode, a gate insulating layer, a source electrode, a drain electrode, a plurality of metallic optical structures, a pixel electrode, and a common electrode. The gate electrode is disposed on the substrate. The gate insulating layer is on the gate electrode. The source electrode and the drain electrode are disposed on the gate insulating layer. The plurality of metallic optical structures are embedded in the gate insulating layer. The pixel electrode electrically connects the drain electrode and is disposed on the plurality of metallic optical structures. The common electrode is disposed under the plurality of metallic optical structures.

A semiconductor device including a substrate, at least one gate electrode, at least two silicon oxide layers comprising a first silicon oxide layer and a second silicon oxide layer, wherein the first silicon oxide layer is nearer to the substrate than the second silicon oxide layer, and wherein a thickness of the first silicon oxide layer is greater than or equal to a thickness of the second silicon oxide layer, and a semiconductor layer disposed between at least a portion of the first silicon oxide layer and at least a portion of the second silicon oxide layer. Also, an image pick-up device and a radiation imaging device including the semiconductor device.

There is provided a display device including: a light emitting element; and a drive transistor (DRTr) that includes a coupling section (W1) and a plurality of channel sections (CH) coupled in series through the coupling section (W1), wherein the drive transistor (DRTr) is configured to supply a drive current to the light emitting element.

An array substrate includes a substrate, driving TFTs, and switch TFTs directly on the substrate. The driving TFT includes a buffer layer, a gate, a first gate insulator layer, a second gate insulator layer, and a metal oxide semiconductor layer stacked in that order on the substrate, and a source electrode and a drain electrode coupled to the metal oxide semiconductor layer. The switch TFT includes a buffer layer, a gate, a second gate insulator layer, and a metal oxide semiconductor layer stacked in that order on the substrate, and a source electrode and a drain electrode coupled to the metal oxide semiconductor layer.

An array substrate includes a substrate, a first insulator layer on the substrate, a second insulator layer on the first insulator layer, a third insulator layer on the second insulator layer, and a first TFT and a second TFT on the substrate. The second TFT includes a second gate electrode on the first insulator layer, a second channel layer on the second insulator layer, and a second source electrode and a second drain electrode on the third insulator layer. The third insulator layer covers the second channel layer and defines a second source hole and a second drain hole.

An array substrate includes a substrate, and a first TFT and a second TFT on the substrate. The second TFT is a low-temperature poly silicon TFT. The first TFT includes a buffer layer, a gate, a gate insulator layer, and a metal oxide semiconductor layer stacked on the substrate in that order. A source electrode and a drain electrode are separately positioned on the gate insulator layer and coupled to the metal oxide semiconductor layer of the first TFT. The metal oxide semiconductor layer partially covers the source electrode and the drain electrode.