A semiconductor element includes a base substrate that includes a Ga.sub.2O.sub.3-based crystal having a thickness of not less than 0.05 m and not more than 50 m, and an epitaxial layer that includes a Ga.sub.2O.sub.3-based crystal and is epitaxially grown on the base substrate. A semiconductor element includes an epitaxial layer that includes a Ga.sub.2O.sub.3-based crystal including an n-type dopant, an ion implanted layer that is formed on a surface of the epitaxial layer and includes a higher concentration of n-type dopant than the epitaxial layer, an anode electrode connected to the epitaxial layer, and a cathode electrode connected to the ion implanted layer.

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a first region and a second region; forming a gate layer on the substrate; forming a first gate dielectric layer on the gate layer; forming a first channel layer on the first region and a second channel layer on the second region; and forming a first source/drain on the first channel layer and a second source/drain on the second channel layer.

This composite substrate has a single-crystal semiconductor thin film (13) provided to at least the front surface of an inorganic insulating sintered-body substrate (11) having a thermal conductivity of at least 5 W/m.Math.K and a volume resistivity of at least 110.sup.8 .Math.cm. The composite substrate also has, provided between the inorganic insulating sintered-body substrate (11) and the single-crystal semiconductor thin film (13), a silicon coating layer (12) comprising polycrystalline silicon or amorphous silicon. As a result of the present invention, metal impurity contamination from the sintered body can be inhibited, even in a composite substrate in which a single-crystal silicon thin film is provided upon an inexpensive ceramic sintered body which is opaque with respect to visible light, which exhibits an excellent thermal conductivity, and which further exhibits little loss at a high frequency range, and characteristics can be improved.

A display may have an array of organic light-emitting diode display pixels. Each display pixel may have a light-emitting diode that emits light under control of a drive transistor. Each display pixel may also have control transistors for compensating and programming operations. The array of display pixels may have rows and columns. Row lines may be used to apply row control signals to rows of the display pixels. Column lines (data lines) may be used to apply display data and other signals to respective columns of display pixels. A bottom conductive shielding structure may be formed below each drive transistor. The bottom conductive shielding structure may serve to shield the drive transistor from any electric field generated from the adjacent row and column lines. The bottom conductive shielding structure may be electrically floating or coupled to a power supply line.

A semiconductor device includes a substrate, an insulating layer over the substrate, a metal oxide layer over the insulating layer, and an oxide semiconductor layer over the metal oxide layer. The insulating layer includes a first region overlapping the metal oxide layer and a second region not overlapping the metal oxide layer. A hydrogen concentration of the first region is greater than a hydrogen concentration of the second region. A nitrogen concentration of the first region is greater than a nitrogen concentration of the second region.

An electronic device and a manufacturing method thereof are provided. The electronic device includes a substrate, a buffer layer, an oxide semiconductor layer, and a gate electrode. The buffer layer is disposed on the substrate. The oxide semiconductor layer is disposed on the buffer layer and has a first part and a second part adjacent to the first part. The gate electrode is overlapped with the first part. A part of the buffer layer is overlapped with the second part of the oxide semiconductor layer, The part of the buffer layer has a first portion and a second portion disposed on the first portion. The concentration of boron in the first portion is greater than the concentration of boron in the second portion.

A semiconductor device having a semiconductor element (a thin film transistor, a thin film diode, a photoelectric conversion element of silicon PIN junction, or a silicon resistor element) which is light-weight, flexible (bendable), and thin as a whole is provided as well as a method of manufacturing the semiconductor device. In the present invention, the element is not formed on a plastic film. Instead, a flat board such as a substrate is used as a form, the space between the substrate (third substrate (17)) and a layer including the element (peeled layer (13)) is filled with coagulant (typically an adhesive) that serves as a second bonding member (16), and the substrate used as a form (third substrate (17)) is peeled off after the adhesive is coagulated to hold the layer including the element (peeled layer (13)) by the coagulated adhesive (second bonding member (16)) alone. In this way, the present invention achieves thinning of the film and reduction in weight.

A TFT substrate and a method for manufacturing the TFT substrate are provided. A TFT structure is formed on a substrate. A color resist layer is formed on the substrate, and a first opening area is formed in the color resist layer at a location corresponding to the TFT structure. A first black matrix is formed in the first opening area such that the TFT structure is covered by the first black matrix. A pixel electrode is formed on the color resist layer and the first black matrix and is electrically coupled to the TFT structure through the first black matrix. With such an arrangement, light can be shielded and light transmittance can be reduced when a panel including the TFT substrate is bent. This helps improve contrast of the panel.

A thin film transistor array panel device comprises: a base substrate; a barrier layer disposed over the base substrate and comprising a plurality of transparent material layers; and an array of thin film transistors disposed over the barrier layer. A difference between a refractive index of the barrier layer and a refractive index of the base substrate may be within about 6%. The transparent material layers may be arranged such that the transparent material layers having compressive residual stress and the transparent material layers having tensile residual stress are alternately stacked. Each of the transparent material layers may comprise silicon oxynitride (SiON).

A semiconductor structure is provided that includes a channel material portion composed of a III-V compound semiconductor located on a mesa portion of a substrate. A dielectric spacer structure is located on each sidewall surface of the channel material portion and each sidewall surface of the mesa portion of the substrate. The dielectric spacer structure has a height that is greater than a height of the channel material portion. An isolation structure is located on each dielectric spacer structure, wherein a sidewall edge of the isolation structure is located between an innermost sidewall surface and an outermost sidewall surface of the dielectric spacer structure.