The present invention provides a manufacture method of a TFT substrate structure and a TFT substrate structure. In the manufacture method of the TFT substrate structure, as manufacturing the gate, a plurality of metal sections distributed in spaces are formed at two sides of the gate, and the gate and the plurality of metal sections are employed to be a mask to implement ion implantation to the polysilicon layer. In the TFT substrate structure according to the present invention, the undoped areas are formed among the n-type heavy doping areas while forming the n-type heavy doping areas at the polysilicon layer.

In accordance with some embodiments of the disclosed subject of matter, a TFT array substrate, a method for fabricating the TFT array substrate, and a display panel that comprises the TFT array substrate are provided. In some embodiments, the TFT array substrate comprises: a substrate; an active layer comprising a first region, a source region, a drain region, and a second region between the drain region and the first region; a gate electrode above the first insulating layer, wherein the gate electrode substantially covers the first region; and a first light-shielding layer that overlaps with the first region and substantially covers the second region.

A semiconductor device includes a first transistor including a first electrode, a first insulating layer above the first electrode, the first insulating layer having a first side wall, a first oxide semiconductor layer on the first side wall, the first oxide semiconductor layer being connected with the first electrode, a first gate electrode, a first gate insulating layer, and a second electrode above the first insulating layer, the second electrode being connected with the first oxide semiconductor layer; and a second transistor including a third electrode, a fourth electrode separated from the third electrode, a second oxide semiconductor layer between the third electrode and the fourth electrode, the second oxide semiconductor layer being connected with each of the third electrode and the fourth electrode, a second gate electrode, and a second gate insulating layer.

Even when a light shielding film is provided between a transistor and a substrate, a threshold voltage of the transistor can be prevented or suppressed from being shifted. A display device includes light shielding films provided between a substrate and a semiconductor layer of a transistor including a gate electrode and the semiconductor layer. The semiconductor layer includes a source region and a drain region. Both of the light shielding films overlap the semiconductor layer when seen in a plan view, and are spaced apart from each other in a direction.

A semiconductor device including an oxide semiconductor in which on-state current is high is provided. The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. Furthermore, the first transistor and the second transistor are transistors having a top-gate structure. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. The first transistor provided in the driver circuit portion includes two gate electrodes between which the oxide semiconductor film is provided.

A semiconductor device capable of retaining data for a long time is provided. A semiconductor device includes a first transistor including a first insulator, a first oxide semiconductor, a first gate, and a second gate; a second transistor including a second oxide semiconductor, a third gate, and a fourth gate; and a node. The first gate and the second gate overlap with each other with the first oxide semiconductor therebetween. The third gate and the fourth gate overlap with each other with the second oxide semiconductor therebetween. The first oxide semiconductor and the second gate overlap with each other with the first insulator therebetween. One of a source and a drain of the first transistor, the first gate, and the fourth gate are electrically connected to the node. The first insulator is configured to charges.

An object is to provide a display device which operates stably with use of a transistor having stable electric characteristics. In manufacture of a display device using transistors in which an oxide semiconductor layer is used for a channel formation region, a gate electrode is further provided over at least a transistor which is applied to a driver circuit. In manufacture of a transistor in which an oxide semiconductor layer is used for a channel formation region, the oxide semiconductor layer is subjected to heat treatment so as to be dehydrated or dehydrogenated; thus, impurities such as moisture existing in an interface between the oxide semiconductor layer and the gate insulating layer provided below and in contact with the oxide semiconductor layer and an interface between the oxide semiconductor layer and a protective insulating layer provided on and in contact with the oxide semiconductor layer can be reduced.

A semiconductor device includes a pillar-shaped semiconductor having an impurity concentration of 10.sup.17 cm.sup.3 or less. A first insulator surrounds the pillar-shaped semiconductor and a first metal surrounds a portion of the first insulator at a first end of the pillar-shaped semiconductor. A second metal surrounds a portion of the first insulator at a second end of the pillar-shaped semiconductor, and a third metal surrounds a portion of the first insulator in a region between the first and second metals. The first metal and the second metal are electrically insulated from the third metal. Source/drain regions are defined in the pillar-shaped semiconductor due to a work function difference between the pillar-shaped semiconductor and the first and second metals.

A display device includes a pixel including a thin film transistor, and an under layer below the thin film transistor. The thin film transistor includes a first gate electrode, a semiconductor layer and a second gate electrode. The semiconductor layer includes a channel region that overlaps at least one of the first gate electrode and the second gate electrode in a plan view. The channel region curves in a thickness direction of the semiconductor layer. The first gate electrode includes a first edge located on the side of an edge of the channel region in a direction of a channel length. The second gate electrode includes a second edge located on the side of the edge of the channel region. The position of the first edge is different from the position of the second edge in the direction of the channel length.

A memory structure includes: first and second word lines; a high-k dielectric layer disposed on the first and second word lines; a channel layer disposed on the high-k dielectric layer and comprising a semiconductor material; first and second source electrodes electrically contacting the channel layer; a first drain electrode disposed on the channel layer between the first and second source electrodes; a memory cell electrically connected to the first drain electrode; and a bit line electrically connected to the memory cell.