The application discloses a thin film transistor and a light-emitting diode (LED) backplane. The thin film transistor includes: a first gate, a first insulating layer, a first source, a semiconductor layer, a first drain, a second insulating layer, and a second gate; the first insulating layer covers the first gate; the first source, the semiconductor layer, and the first drain are all disposed at a side of the first insulating layer away from the first gate; the second insulating layer covers the first drain, the semiconductor layer, and the first source; and the second gate is disposed on a surface of a side of the second insulating layer away from the first gate, wherein the first source, the semiconductor layer, and the first drain jointly constitute a vertical channel structure.

Oxide layers which contain at least one metal element that is the same as that contained in an oxide semiconductor layer including a channel are formed in contact with the top surface and the bottom surface of the oxide semiconductor layer, whereby an interface state is not likely to be generated at each of an upper interface and a lower interface of the oxide semiconductor layer. Further, it is preferable that an oxide layer, which is formed using a material and a method similar to those of the oxide layers be formed over the oxide layers Accordingly, the interface state hardly influences the movement of electrons.

An apparatus and method, the apparatus comprising: at least one charged substrate (3); a channel of two dimensional material (5); and at least one floating electrode (7A-C) wherein the floating electrode comprises a first area (10A-C) adjacent the at least one charged substrate, a second area (11A-C) adjacent the channel of two dimensional material and a conductive interconnection (9A-C) between the first area and the second area wherein the first area is larger than the second area and wherein the at least one floating electrode is arranged to control the level of doping within the channel of two dimensional material.

A thin film device has a source region, a drain region, a first gate disposed between the source region and the drain region, a second gate disposed between the source region and the drain region, wherein the second gate region is in close proximity with the first gate region, a semiconductor film disposed between the source region, the drain region, and the first and second gate regions, and a dielectric material disposed between the source region, the drain region, the first and second gate regions, and the semiconductor film.

A display device having at least a plurality of pixel circuits, connected to signal lines to which data signals in accordance with luminance information are supplied, arranged in a matrix, wherein pixel circuits of odd number columns and even number columns adjacent sandwiching an axis in a column direction parallel to an arrangement direction of the signal lines have a mirror type circuit arrangement symmetric about the axis of the column direction, and there are lines different from the signal lines between signal lines of adjacent pixel circuits.

A variable capacitor is formed from a pair of electrodes and a dielectric interposed between the electrodes over a substrate, and an external input is detected by changing capacitance of the variable capacitor by a physical or electrical force. Specifically, a variable capacitor and a sense amplifier are provided over the same substrate, and the sense amplifier reads the change of capacitance of the variable capacitor and transmits a signal in accordance with the input to a control circuit.

Provided are liquid crystal display and the method for manufacturing the same. According to an aspect of the present disclosure, there is provided a liquid crystal display device, including: a first substrate; a gate electrode disposed on the first substrate; a semiconductor pattern layer disposed on the gate electrode; and a source electrode and a drain electrode disposed on the semiconductor pattern layer and facing each other, wherein the gate electrode includes a reference plane and a protrusion protruding from the reference plane in a horizontal direction, and the protrusion overlaps the source electrode and the drain electrode.

An object is to provide a deposition method in which a gallium oxide film is formed by a DC sputtering method. Another object is to provide a method for manufacturing a semiconductor device using a gallium oxide film as an insulating layer such as a gate insulating layer of a transistor. An insulating film is formed by a DC sputtering method or a pulsed DC sputtering method, using an oxide target including gallium oxide (also referred to as GaO.sub.X). The oxide target includes GaO.sub.X, and X is less than 1.5, preferably more than or equal to 0.01 and less than or equal to 0.5, further preferably more than or equal to 0.1 and less than or equal to 0.2. The oxide target has conductivity, and sputtering is performed in an oxygen gas atmosphere or a mixed atmosphere of an oxygen gas and a rare gas such as argon.

The present invention provides a pixel unit and an array substrate. The pixel electrode includes four branch sections to divide the pixel zone into four display domains, helping improve the large angle color shifting problem of a display product and also simplifying the structure of the pixel electrode and making the manufacturing process simple, and facilitating the production of large-size wide-angle display products. The array substrate of the present invention is composed, in the horizontal direction, of multiple pixel units. The pixel units each include a pixel electrode that includes four branch sections to divide the pixel zone into four display domains, helping improve the large angle color shifting problem of a display product, and the pixel electrode has a simple structure to simplify the manufacturing process and facilitate the production of large-size wide-angle display products.

A display device includes a pixel including a thin film transistor, and an under layer below the thin film transistor. The thin film transistor includes a first gate electrode, a semiconductor layer and a second gate electrode. The semiconductor layer includes a channel region that overlaps at least one of the first gate electrode and the second gate electrode in a plan view. The channel region curves in a thickness direction of the semiconductor layer. The first gate electrode includes a first edge located on the side of an edge of the channel region in a direction of a channel length. The second gate electrode includes a second edge located on the side of the edge of the channel region. The position of the first edge is different from the position of the second edge in the direction of the channel length.