Patent classifications
H10D30/6734
Metal Oxide Film and Semiconductor Device
A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
SEMICONDUCTOR DEVICE
Provided is a semiconductor device capable of holding data for a long period. The semiconductor device includes first to third transistors, a capacitor, and a circuit. The third transistor includes a first gate and a second gate. A gate of the first transistor is electrically connected to a first terminal of the capacitor. A first terminal of the first transistor is electrically connected to the second gate. A second terminal of the first transistor is electrically connected to the circuit. A gate of second transistor is electrically connected to a first terminal of the second transistor. A first terminal of the second transistor is electrically connected to the second gate. A second terminal of the second transistor is electrically connected to a first terminal of the capacitor. The circuit is configured to generate a negative potential. A channel formation region of the first transistor preferably includes an oxide semiconductor.
SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, AND SEMICONDUCTOR WAFER
A semiconductor device capable of stably holding data for a long time is provided. A transistor including a back gate is used as a writing transistor of a memory element. In the case where the transistor is an n-channel transistor, a negative potential is supplied to a back gate in holding memory. The supply of the negative potential is stopped while the negative potential is held in the back gate. In the case where an increase in the potential of the back gate is detected, the negative potential is supplied to the back gate.
CARBON NANOSTRUCTURE DEVICE FABRICATION UTILIZING PROTECT LAYERS
Hall effect devices and field effect transistors are formed incorporating a carbon-based nanostructure layer such as carbon nanotubes and/or graphene with a sacrificial metal layer formed there over to protect the carbon-based nanostructure layer during processing.
TRANSISTOR AND SEMICONDUCTOR DEVICE
A highly reliable semiconductor device which includes an oxide semiconductor is provided. Alternatively, a transistor having normally-off characteristics which includes an oxide semiconductor is provided. The transistor includes a first conductor, a first insulator, a second insulator, a third insulator, a first oxide, an oxide semiconductor, a second conductor, a second oxide, a fourth insulator, a third conductor, a fourth conductor, a fifth insulator, and a sixth insulator. The second conductor is separated from the sixth insulator by the second oxide. The third conductor and the fourth conductor are separated from the sixth insulator by the fifth insulator. The second oxide has a function of suppressing permeation of oxygen as long as oxygen contained in the sixth insulator is sufficiently supplied to the oxide semiconductor through the second oxide. The fifth insulator has a barrier property against oxygen.
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor device includes a first barrier layer having a barrier property against oxygen and hydrogen over a substrate, a first insulator over the first barrier layer, a second insulator over the first insulator, a third insulator over the second insulator, a transistor including an oxide semiconductor over the third insulator, a fourth insulator including an oxygen-excess region over the transistor, and a second barrier layer having a barrier property against oxygen and hydrogen over the fourth insulator. The transistor includes a first conductor with oxidation resistance, a second conductor with oxidation resistance, and a third conductor with oxidation resistance, the second insulator includes a high-k material, the first barrier layer and the second barrier layer are in contact with each other in an outer edge of a region where the transistor is provided, and the transistor is surrounded by the first barrier layer and the second barrier layer.
SEMICONDUCTOR DEVICE AND DISPLAY DEVICE INCLUDING THE SEMICONDUCTOR DEVICE
Provided is a novel semiconductor device. The semiconductor device comprises a first transistor and a second transistor. The first transistor comprises a first gate electrode; a first insulating film over the first gate electrode; a first oxide semiconductor film over the first insulating film; a first source electrode and a first drain electrode over the first oxide semiconductor film; a second insulating film over the first oxide semiconductor film, the first source electrode, and the first drain electrode; and a second gate electrode over the second insulating film. The second transistor comprises a first drain electrode; the second insulating film over the second drain electrode; a second oxide semiconductor film over the second insulating film; a second source electrode and a second drain electrode over the second oxide semiconductor film; a third insulating film over the second oxide semiconductor film, the second source electrode, and the second drain electrode; and a third gate electrode over the third insulating film. The first oxide semiconductor film partly overlaps with the second oxide semiconductor film.
CIRCUIT, LOGIC CIRCUIT, PROCESSOR, ELECTRONIC COMPONENT, AND ELECTRONIC DEVICE
A circuit suitable for data backup of a logic circuit is provided. The circuit includes first to fourth nodes, a capacitor, first to third transistors, and first and second circuits. Data can be loaded and stored between the circuit and the logic circuit. The first node is electrically connected to a data output terminal of the logic circuit. The second node is electrically connected to a data input terminal of the logic circuit. The capacitor is electrically connected to the third node. The first transistor controls electrical continuity between the first node and the third node. The second transistor controls electrical continuity between the second node and the third node. The third transistor controls electrical continuity between the second node and the fourth node. The first and second circuits have functions of raising gate voltage of the first transistor and raising gate voltage of the second transistor, respectively.
CIRCUIT, SEMICONDUCTOR DEVICE, DISPLAY DEVICE, ELECTRONIC DEVICE, AND DRIVING METHOD OF CIRCUIT
A semiconductor device with lower power consumption or a display device including the semiconductor device is provided. A circuit to which an N-bit signal is input includes a first digital-to-analog converter circuit to which an upper M-bit signal is input, a second digital-to-analog converter circuit to which a lower (NM)-bit signal is input, and an amplifier circuit. The amplifier circuit includes a first transistor and a second transistor. An output terminal of the first digital-to-analog converter circuit is electrically connected to a gate of the first transistor. An output terminal of the second digital-to-analog converter circuit is electrically connected to a substrate potential of the second transistor. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor. An output terminal of the amplifier circuit is electrically connected to a gate of the second transistor.
Amplified dual-gate bio field effect transistor
The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device may include a substrate; a gate structure disposed on a first surface of the substrate and an interface layer formed on the second surface of the substrate. The interface layer may allow for a receptor to be placed on the interface layer to detect the presence of a biomolecule or bio-entity. An amplification factor of the BioFET device may be provided by a difference in capacitances associated with the gate structure on the first surface and with the interface layer formed on the second surface.