In a solid-state imaging device, a photoelectric conversion unit, a transfer transistor, and at least a part of electric charge holding unit, among pixel constituent elements, are disposed on a first semiconductor substrate. An amplifying transistor, a signal processing circuit other than a reset transistor, and a plurality of common output lines, to which signals are read out from a plurality of pixels, are disposed on a second semiconductor substrate.

A solid-state imaging device includes a pixel array unit in which a plurality of imaging pixels configured to generate an image, and a plurality of phase difference detection pixels configured to perform phase difference detection are arranged, each of the plurality of phase difference detection pixels including a plurality of photoelectric conversion units, a plurality of floating diffusions configured to convert charges stored in the plurality of photoelectric conversion units into voltage, and a plurality of amplification transistors configured to amplify the converted voltage in the plurality of floating diffusions.

A solid-state imaging device includes: a semiconductor substrate provided with an effective pixel region including a light receiving section that photoelectrically converts incident light; an interconnection layer that is provided at a plane side opposite to the light receiving plane of the semiconductor substrate; a first groove portion that is provided between adjacent light receiving sections and is formed at a predetermined depth from the light receiving plane side of the semiconductor substrate; and an insulating material that is embedded in at least a part of the first groove portion.

Embodiments of a hybrid imaging sensor and methods for pixel sub-column data read from the within a pixel array.

A semiconductor device is provided. The device generates a signal based on both a first carrier generated in a first photodiode and a second carrier generated in a second photodiode. The first photodiode includes a first region of a second conductivity type and a second region of a first conductivity type arranged between a surface of a substrate and the first region. The second photodiode includes a third region of the first conductivity type and a fourth region of the second conductivity type arranged between the surface and the third region. A fifth region of the first conductivity type is provided at a position farther apart from the surface than the first region. A peak of an impurity concentration of the third region is positioned in a range where the first region exists between the second region and the fifth region.

An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes a pixel including a first active region where a photodiode and a transfer transistor are formed and a second active region for supplying a grounding potential. Over a p-type semiconductor region in the second active region, a plug for supplying the grounding potential is disposed. In an n-type semiconductor region for a drain region of the transfer transistor formed in the first active region, a gettering element is introduced. However, in the p-type semiconductor region in the second active region, the gettering element is not introduced.

Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.

The present invention makes it possible to read a pixel signal at high speed. A pixel array includes a plurality of pixels that store an electrical charge. The amount of stored electrical charge is based on the amount of received light. A first pixel current source and a second pixel current source are coupled in parallel between a ground voltage and a pixel output node on a pixel signal read line. A switch is disposed in a wiring path that couples the pixel output node, the second pixel current source, and the ground voltage.

A method of implementing dynamic ground sharing in an image sensor with pipeline architecture starts with a pixel array capturing image data. Pixel array includes pixels to generate pixel data signals, respectively. A readout circuitry acquires the image data from a row in the pixel array. An analog-to-digital conversion (ADC) circuitry included in the readout circuitry samples the image data from the row to obtain sampled input data. When the ADC circuitry is sampling, a ground sharing switch is closed to couple the pixel array and the ADC circuitry to a common ground. When the ADC circuitry is not sampling, the ground sharing switch is open to separate the pixel array and the ADC circuitry from the common ground. The ADC circuitry converts the sampled image data from analog to digital to obtain an ADC output. Other embodiments are described.

A solid-state image pickup device includes a pixel unit in which a plurality of photoelectric conversion elements having different sensitivities are arranged; and a pixel reading unit configured to read and add output signals from the plurality of photoelectric conversion elements in the pixel unit, and to obtain an output signal seemingly from one pixel. The pixel unit includes an absorbing unit configured to absorb overflowing electric charge from a photoelectric conversion element with a high sensitivity.