The present technology relates to a solid-state imaging device that can reduce the number of steps and enhance mechanical strength, a method of manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes a laminate including a first semiconductor substrate having a pixel region and at least one second semiconductor substrate having a logic circuit, the at least one second semiconductor substrate being bonded to the first semiconductor substrate such that the first semiconductor substrate becomes an uppermost layer, and a penetration connecting portion that penetrates from the first semiconductor substrate into the second semiconductor substrate and connects a first wiring layer formed in the first semiconductor substrate to a second wiring layer formed in the second semiconductor substrate. The first wiring layer is formed with Al or Cu. The present technology is applicable, for example, to a back-surface irradiation type CMOS image sensor.

To provide an imaging device capable of high-speed reading. The imaging device includes a photodiode, a first transistor, a second transistor, a third transistor, and a fourth transistor. The back gate electrode of the first transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the first transistor and a potential lower than the source potential of the first transistor. The back gate electrode of the second transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the second transistor. The back gate electrode of the third transistor is electrically connected to a wiring that can supply a potential higher than a source potential of the third transistor and a potential lower than the source potential of the third transistor.

A solid-state imaging element that includes a plurality of semiconductor layers stacked, a plurality of stack-connecting parts for electrically connecting the plurality of semiconductor layers, a pixel array part in which pixel cells that include a photoelectric conversion part and a signal output part are arrayed in a two-dimensional shape, and an output signal line through which signals from the signal output part of the pixel cells are propagated, in which the plurality of semiconductor layers includes at least a first semiconductor layer and a second semiconductor layer, and, in the first semiconductor layer, the plurality of pixel cells are arrayed in a two-dimensional shape, the signal output part of a pixel group formed with the plurality of pixel cells shares an output signal line wired from the stack-connecting parts, and the output signal line has a separation part which can separate each output signal line.

There are provided a first semiconductor substrate in which a plurality of photoelectric conversion circuits, which are some circuit elements of the pixel cells including the photoelectric conversion unit, are formed in a two-dimensional matrix, a second semiconductor substrate in which a plurality of memory circuits, which are some other circuit elements of the pixel cells, are formed in a two-dimensional matrix, wherein the some other circuit elements of the pixel cells include memory units that correspond to the photoelectric conversion circuits, store electric signals output by the photoelectric conversion units, and output pixel signals according to the electric signals, and a connection electrode electrically connected to a signal line of the photoelectric conversion circuits and a signal line of the memory circuits, wherein the pixel cells are divided into a plurality of pixel groups in which the pixel cells are combined so that adjacent pixel cells are not included if pixel cells corresponding to light beams of the same wavelength band are considered to be arranged on one surface, wherein the same connection electrode is shared between the photoelectric conversion circuits and between the memory circuits of the pixel cells included in the same pixel group, and wherein signal lines of the photoelectric conversion circuits and signal lines of the memory circuits of the pixel cells included in different pixel groups are connected by different connection electrodes.

A back-side illumination image capturing apparatus includes a semiconductor substrate having a first surface for receiving incident light and a second surface located on the opposite side as the first surface, and including a photoelectric conversion portion, and a gate electrode disposed above the second surface. The apparatus further includes a first insulating layer disposed above the second surface of the semiconductor substrate, an interlayer insulation film disposed on the first insulating layer, a contact plug connected to the gate electrode, and a light-cutting portion for cutting light, of the incident light, that has passed through the photoelectric conversion portion. The light-cutting portion passes through at least part of the interlayer insulation film. The first insulating layer is located between the light-cutting portion and the semiconductor substrate.

The present disclosure relates to a solid-state imaging device, a signal processing method therefor, and an electronic apparatus enabling sensitivity correction in which a sensitivity difference between solid-state imaging devices is suppressed.

The solid-state imaging device includes a pixel unit in which one microlens is formed for a plurality of pixels in a manner such that a boundary of the microlens coincides with boundaries of the pixels. The correction circuit corrects a sensitivity difference between the pixels inside the pixel unit based on a correction coefficient. The present disclosure is applicable to, for example, a solid-state imaging device and the like.

The present technology relates to a solid-state imaging device, manufacturing method of a solid-state imaging device, and an electronic device, which can provide a solid-state imaging device having further improved features such as reduced optical color mixing and the like. Also, an electronic device using the solid-state imaging device thereof is provided. According to a solid-state imaging device having a substrate and multiple photoelectric converters that are formed on the substrate, an insulating film forms an embedded element separating unit. The element separating unit is configured of an insulating film having a fixed charge that is formed so as to coat the inner wall face of a groove portion, within the groove portion which is formed in the depth direction from the light input side of the substrate.

An image sensor includes a substrate comprising a first face and a second surface which faces the first surface and on which light is incident, a semiconductor photoelectric conversion device on the substrate, a gate electrode located between the first surface of the substrate and the semiconductor photoelectric conversion device and extending in a first direction perpendicular to the first surface, and an organic photoelectric conversion device stacked on the second surface of the substrate.

In one form, a hybrid bonded image sensor comprises a photodiode chip, a circuit carrying chip, and an interconnection. The photodiode chip provides charge to a first floating diffusion in response to incident light, wherein the first floating diffusion is coupled to a first terminal on a first surface of the photodiode chip. The circuit carrying chip has a first terminal aligned with the first terminal of the photodiode chip, the circuit carrying chip forming an output voltage based on charge transferred on the first floating diffusion sensed from the first terminal thereof. The interconnection connects the first terminal of the photodiode chip to the first terminal of the circuit carrying chip.

A solid-state imaging device includes a pixel array section and a signal processing section. The pixel array section is configured to include a plurality of arranged rectangular pixels, each of which has different sizes in the vertical and horizontal directions, and a plurality of adjacent ones of which are combined to form a square pixel having the same size in the vertical and horizontal directions. The signal processing section is configured to perform a process of outputting, as a single signal, a plurality of signals read out from the combined plurality of rectangular pixels.