Patent classifications
H10F77/30
SOLAR CELL ELEMENT, METHOD FOR MANUFACTURING SOLAR CELL ELEMENT AND SOLAR CELL MODULE
A solar cell element comprises a semiconductor substrate, a passivation layer and a protective layer. The semiconductor substrate includes a p-type semiconductor region on one main surface thereof. The passivation layer is located on the p-type semiconductor region and contains aluminum oxide. The protective layer is located on the passivation layer and contains silicon oxide which contains hydrogen and carbon.
COMPOSITE MATERIAL FOR FLUORESCENT QUANTUM DOT MICRO-NANO PACKAGING
A composite material for fluorescent quantum dot micro-nano packaging. The composite material comprises fluorescent quantum dots, a mesoporous particle material having a nanometer lattice structure, and a barrier layer, wherein the fluorescent quantum dots are distributed in the mesoporous particle material, and the barrier layer is coated on the outer surface of the mesoporous particle material. In the composite material according to the invention, the quantum dot aggregation can be effectively retarded, with the barrier layer coated on the surface the water-oxygen micromolecule erosion is prevented, the compatibility and stability of the composite fluorescent particles is improved, and the service life of the composite material for fluorescent quantum dot micro-nano packaging is thus greatly improved.
SOLAR CELL MODULE AND METHOD FOR MANUFACTURING THE SAME
A solar cell module and a method for manufacturing the same are disclosed. The solar cell module includes solar cells each including a semiconductor substrate, and first electrodes and second electrodes extending in a first direction on a surface of the semiconductor substrate, conductive lines extended in a second direction crossing the first direction on the surface of the semiconductor substrate and connected to the first electrodes or the second electrodes through a conductive adhesive, and an insulating adhesive portion extending in the first direction on at least a portion of the surface of the semiconductor substrate, on which the conductive lines are disposed, and fixing the conductive lines to the semiconductor substrate and the first and second electrodes. The insulating adhesive portion is attached up to an upper part and a side of at least a portion of each conductive line.
PHOTOELECTRIC CONVERSION DEVICE
A photoelectric conversion device includes: an element substrate having a first electrode, a photoelectric conversion layer, and a second electrode, the photoelectric conversion layer being provided above the first electrode and performing charge separation by energy of irradiated light, and the second electrode being provided above the photoelectric conversion layer; a counter substrate facing the element substrate; and a sealing layer provided between the element substrate and the counter substrate. The element substrate, the counter substrate, and the sealing layer define a sealing region sealing the photoelectric conversion layer. The element substrate further has: an impurity detection layer in contact with the second electrode inside the sealing region and causing chemical reaction with an impurity containing at least one of oxygen and water; and a third electrode in contact with the impurity detection layer and extending to the outside of the sealing region.
BACK-CONTACT SOLAR CELL, MANUFACTURING METHOD THEREFOR, AND SOLAR-CELL ASSEMBLY
The present disclosure provides a back-contact solar cell, a fabrication method, and a solar-cell assembly. In one aspect, a back-contact solar cell includes a solar-cell body and an isolating groove. The solar-cell body includes a silicon substrate, a first semiconductor layer in a first region of a back surface of the silicon substrate, a second semiconductor layer having a portion in a second region of the back surface, and a transparent conductive film layer stacked on the first and second semiconductor layers. The isolating groove extends through the second semiconductor layer and the transparent conductive film layer. An area of a cross section of the isolating groove decreases towards the silicon substrate, and the cross section is parallel to the silicon substrate.
Photovoltaic cell, method for manufacturing same, and photovoltaic module
The photovoltaic cell includes a silicon substrate, a first passivation layer, a second passivation layer, at least one silicon oxynitride layer, and at least one silicon nitride layer. The second passivation layer includes a first silicon oxide layer and at least one aluminum oxide layer, and a thickness of the at least one aluminum oxide layer is in a range of 4 nm to 20 nm. The number of silicon atoms is greater than the number of oxygen atoms in the at least one silicon oxynitride layer and the number of oxygen atoms is greater than the number of nitride atoms in the at least one silicon oxynitride layer. The first silicon oxide layer is disposed between the substrate and the at least one aluminum oxide layer, and a thickness of the first silicon oxide layer is in a range of 0.1 nm to 5 nm.
UV-curing of light receiving surfaces of solar cells
Methods of fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a passivating dielectric layer on a light-receiving surface of a silicon substrate. The method also includes forming an anti-reflective coating (ARC) layer below the passivating dielectric layer. The method also includes exposing the ARC layer to ultra-violet (UV) radiation. The method also includes, subsequent to exposing the ARC layer to ultra-violet (UV) radiation, thermally annealing the ARC layer.
Uncooled infrared photodetectors
Methods, apparatus and systems are described that relate to uncooled long-wave infrared (LWIR) photodetectors capable of operating at room temperature and having a simple structure that can be manufactured at low cost. One example LWIR photodetector includes a layer of amorphous silicon (a-Si) disposed on a silicon substrate and a layer of amorphous germanium (a-Ge) disposed on the a-Si layer, wherein the a-Ge layer is operable to absorb infrared light and provide photoconductive gain, and the a-Si layer is operable to produce carrier multiplication via cycling excitation process.
Optical sensing apparatus
An optical sensing apparatus including: a substrate including a first material; an absorption region including a second material different from the first material; an amplification region formed in the substrate and configured to collect at least a portion of the photo-carriers from the absorption region and to amplify the portion of the photo-carriers; an interface-dopant region formed in the substrate between the absorption region and the amplification region; a buffer layer formed between the absorption region and the interface-dopant region; one or more field-control regions formed between the absorption region and the interface-dopant region and at least partially surrounding the buffer layer; and a buried-dopant region formed in the substrate and separated from the absorption region, where the buried-dopant region is configured to collect at least a portion of the amplified portion of the photo-carriers from the amplification region.
Sensor package structure
A sensor package structure includes a substrate, a sensor chip disposed on and electrically coupled to the substrate, a plurality of adhesive rings disposed on the sensor chip, a plurality of filtering lenses respectively adhered to the adhesive rings, and an encapsulant that surrounds the above components. A sensing region of the sensor chip has a layout boundary and a plurality of sub-regions that are defined by the layout boundary and that are separate from each other. The adhesive rings are disposed on the sensing region, and each of the adhesive rings surrounds one of the sub-regions. Each of the filtering lenses, a corresponding one of the adhesive rings, and a corresponding one of the sub-regions jointly define a buffering space. The encapsulant is formed on the substrate and covers the layout boundary of the sensor chip.